Light-emitting diode and backplane and led display including the same
US-2021119079-A1 · Apr 22, 2021 · US
US12068178B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12068178-B2 |
| Application number | US-202217736352-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 4, 2022 |
| Priority date | Nov 16, 2021 |
| Publication date | Aug 20, 2024 |
| Grant date | Aug 20, 2024 |
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A chip transfer apparatus includes: a chip storage module in which a plurality of micro-semiconductor chips and a suspension including impurities are stored; a chip filtration module separating a first suspension including the plurality of micro-semiconductor chips and a second suspension including the impurities in the suspension; and a chip supply module configured to supply the first suspension onto the transfer substrate such that the first suspension is introduced from the chip filtration module and the plurality of micro-semiconductor chips are flowable on the transfer substrate.
Opening claim text (preview).
What is claimed is: 1. A chip transfer apparatus configured to align a plurality of micro-semiconductor chips in a plurality of grooves of a transfer substrate, the chip transfer apparatus comprising: a chip storage module configured to store a suspension including the plurality of micro-semiconductor chips and impurities; a chip filtration module configured to receive the suspension from the chip storage module and separate a first suspension including the plurality of micro-semiconductor chips and a second suspension including the impurities; and a chip supply module configured to supply the first suspension onto the transfer substrate from the chip filtration module, wherein the plurality of micro-semiconductor chips included in the first suspension are flowable on the transfer substrate, wherein the chip filtration module comprises: an inlet connected to a lower area of the chip storage module, the inlet configured to receive the suspension introduced from the chip storage module; a channel connected to the inlet and through which the suspension flows; and a first outlet connected to the channel and an upper area of the chip supply module and configured to discharge the first suspension to the chip supply module. 2. The chip transfer apparatus of claim 1 , wherein the chip filtration module is further configured to separate the suspension into the first suspension and the second suspension using at least one of sonophoretic dynamics, dielectrophoresis, magnetophoretic dynamics, microfluidic dynamics, centrifugal force, or pinched flow fractionation. 3. The chip transfer apparatus of claim 1 , wherein at least one of a size and a mass of the impurities is different from a size or a mass of the micro-semiconductor chips included in the first suspension. 4. The chip transfer apparatus of claim 1 , wherein the impurities comprise a micro-semiconductor chip debris having at least one of a size and a mass different from a size or a mass of the micro-semiconductor chips included in the first suspension. 5. The chip transfer apparatus of claim 4 , wherein a micro-semiconductor chip debris included in the second suspension is smaller than the micro-semiconductor chips included in the first suspension. 6. The chip transfer apparatus of claim 4 , wherein the micro-semiconductor chip debris included in the second suspension is a partially broken micro-semiconductor chip. 7. The chip transfer apparatus of claim 1 , wherein the chip filtration module is formed of a substrate including at least one of silicon, glass, polymer, plastic, or metal, and wherein the channel is embedded in the substrate. 8. The chip transfer apparatus of claim 1 , wherein an anti-adhesive film is formed on a surface of the channel, the anti-adhesive film configured to prevent adherence of the micro-semiconductor chips. 9. The chip transfer apparatus of claim 8 , wherein the anti-adhesive film is hydrophobic. 10. The chip transfer apparatus of claim 1 , further comprising: a second outlet connected to the channel and configured to discharge the second suspension. 11. The chip transfer apparatus of claim 10 , wherein the channel comprises: a branching area in which the micro-semiconductor chips and the impurities are separated; a first channel through which the suspension flows, the first channel connecting the inlet to the branching area; a second channel through which the first suspension flows, the second channel connecting the branching area to the first outlet; and a third channel through which the second suspension flows, the third channel connecting the branching area to the second outlet. 12. The chip transfer apparatus of claim 11 , wherein a dimension of the third channel is smaller than a dimension of the second channel. 13. The chip transfer apparatus of claim 11 , wherein the third channel comprises a first sub-channel and a second sub-channel spaced apart the first sub-channel, and wherein the second channel is provided between the first sub-channel and the second sub-channel. 14. The chip transfer apparatus of claim 13 , wherein the first sub-channel and the second sub-channel have a symmetrical structure with respect to the second channel. 15. The chip transfer apparatus of claim 1 , wherein the chip filtration module further comprises: a second outlet connected to the channel and configured to discharge a first sub-suspension including impurities smaller than the micro-semiconductor chips in the second suspension; and a third outlet connected to the channel and configured to discharge a second sub-suspension including impurities larger than the micro-semiconductor chips in the second suspension. 16. The chip transfer apparatus of claim 15 , wherein the channel comprises: a first branching area and a second branching area spaced apart from the first branching area; a first channel through which the suspension flows, the first channel connecting the inlet to the first branching area; a second channel through which the first suspension and the second sub-suspension flow, the second channel connecting the first branching area to the first branching area; a third channel through which the first sub-suspension flows, the third channel connecting the first branching area to the second outlet; a fourth channel through which the first suspension flows, the fourth channel connecting the second branching area to the first outlet; and a fifth channel through which the second sub-suspension flows, the fifth channel connecting the second branching area to the third outlet. 17. The chip transfer apparatus of claim 16 , wherein the first channel, the second channel, and the fifth channel have a same length direction. 18. The chip transfer apparatus of claim 1 , wherein the chip storage module comprises: a stirrer configured to mix the suspension to make a concentration of the micro-semiconductor chips uniform. 19. The chip transfer apparatus of claim 1 , wherein the micro-semiconductor chips are light-emitting devices. 20. The chip transfer apparatus of claim 19 , wherein the light-emitting devices each comprise first and second electrodes apart from each other on one surface. 21. A chip filtration apparatus comprising: an inlet configured to receive a first suspension including a plurality of micro-semiconductor chips and a plurality of impurities; a first channel configured to transport the first suspension from the inlet to a junction at which the first suspension is separated into a second suspension including the plurality of micro-semiconductor chips and a third suspension including the plurality of impurities; a second channel connected to the junction and configured to transport the second suspension including the plurality of micro-semiconductor chips; a third channel connected to the junction and configured to transport the third suspension including the plurality of impurities; a first outlet connected to the second channel and configured to receive the second suspension including the plurality of micro-semiconductor chips; and a second outlet connected to the third channel and configured to receive the third suspension including the plurality of impurities. 22. The chip filtration apparatus of claim 21 , wherein the inlet is connected to a lower area of a chip storage module. 23. The chip filtration apparatus of claim 21 , wherein the first outlet is connected to an upper area of a chip supply module and configured to discharge the second
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