Serial presence detect logging

Patent metadata

Field	Value
Publication number	US-12067261-B2
Application number	US-202217857252-A
Country	US
Kind code	B2
Filing date	Jul 5, 2022
Priority date	Jul 15, 2021
Publication date	Aug 20, 2024
Grant date	Aug 20, 2024

Abstract

A serial presence detect (SPD) device includes a region of nonvolatile memory for SPD data and an additional region for other (e.g., vendor) use. The additional region may be subdivided into write protect regions that can be individually and independently write protected. To configure the write protection, a password key scheme is used to enter a mode whereby the write protection attributes may be configured. Another password key scheme is used to exit the write protection configuration mode.

First claim

What is claimed is:

1. A serial presence detect memory device, comprising:
a password register;
a first plurality of nonvolatile memory locations to store serial presence detect information according to a serial presence detect standard; and
a second plurality of nonvolatile memory locations to store first data, the second plurality of nonvolatile memory locations subject to write access protection that is configurable and the write access protection is to become not configurable based on the serial presence detect memory device receiving a first write command to write a first value stored in the password register and in succession to the first write command, receiving a second write command to write a second value that is not stored in the password register.

2. The serial presence detect memory device of claim 1 , wherein the write access protection becomes configurable based on the serial presence detect memory device receiving two successive write commands to write the first value stored in the password register.

3. The serial presence detect memory device of claim 1 , wherein the second plurality of nonvolatile memory locations is divided into a plurality of groups of memory locations, whether each group of the plurality of groups of memory locations is subject to write access protection is independently configurable.

4. The serial presence detect memory device of claim 3 , each group of the plurality of groups of memory locations comprises 256 memory locations.

5. The serial presence detect memory device of claim 4 , wherein there are three groups of memory locations in the plurality of groups of memory locations.

6. The serial presence detect memory device of claim 1 , wherein the first value is configurable.

7. The serial presence detect memory device of claim 1 , wherein the second value is configurable.

8. A module, comprising:
a plurality of volatile memory devices;
a nonvolatile memory device comprising:
a password register;
a first plurality of nonvolatile memory locations to store serial presence detect information about the plurality of volatile memory devices; and
a second plurality of nonvolatile memory locations to store first data, the second plurality of nonvolatile memory locations subject to write access protection that is configurable and the write access protection is to become not configurable based on the serial presence detect memory device receiving a first write command to write a first value stored in the password register and in succession to the first write command, receiving a second write command to write a second value that is not stored in the password register.

9. The module of claim 8 , wherein the first plurality of nonvolatile memory locations are to store serial presence detect information according to a serial presence detect standard.

10. The module of claim 8 , wherein the write access protection becomes configurable based on the nonvolatile memory device receiving two successive write commands to write the first value stored in the password register.

11. The module of claim 8 , wherein the second plurality of nonvolatile memory locations is divided into a plurality of groups of memory locations, whether each group of the plurality of groups of memory locations is subject to write access protection is independently configurable.

12. The module of claim 11 , each group of the plurality of groups of memory locations comprises 256 memory locations.

13. The module of claim 12 , wherein there are three groups of memory locations in the plurality of groups of memory locations.

14. The module of claim 10 , wherein the first value is configurable.

15. The module of claim 14 , wherein the second value is configurable.

16. A method, comprising:
accessing serial presence detect information in a first plurality of nonvolatile memory locations;
accessing, subject to write access protection, a second plurality of nonvolatile memory locations that hold first data; and
writing a first value stored in a password register and in succession to writing the first value, writing a second value that is not stored in the password register to cause the write access protection of the second plurality of nonvolatile memory locations to become not configurable.

17. The method of claim 16 , wherein serial presence detect information in the first plurality of nonvolatile memory locations is stored according to a serial presence detect standard.

18. The method of claim 17 , further comprising:
successively writing the first value that is stored by the password register two times to configure the write access protection of the second plurality of nonvolatile memory locations.

19. The method of claim 18 , wherein the second plurality of nonvolatile memory locations is divided into a plurality of groups of memory locations, the method further comprising:
configuring the write access protection of a first group of the plurality of groups of memory locations independently of the other of the plurality of groups of memory locations.

20. The method of claim 19 , wherein each group of the plurality of groups of memory locations comprises 256 memory locations and there are three groups of memory locations in the plurality of groups of memory locations.

Assignees

• Rambus Inc

Inventors

• Shallal Aws
• Chen Chen

Classifications

• G06F3/0644

  Management of space entities, e.g. partitions, extents, pools · CPC title

• G06F3/0683

  Plurality of storage devices · CPC title

• G06F21/79

  in semiconductor storage media, e.g. directly-addressable memories · CPC title

• G06F3/0637

  Permissions · CPC title

• G06F3/0622 Primary

  in relation to access · CPC title