Avalanche photodiodes with lower excess noise and lower bandwidth variation

Patent metadata

Field	Value
Publication number	US-12057518-B2
Application number	US-202217592992-A
Country	US
Kind code	B2
Filing date	Feb 4, 2022
Priority date	Apr 20, 2021
Publication date	Aug 6, 2024
Grant date	Aug 6, 2024

Abstract

An avalanche photodiode includes a silicon layer on a substrate; a germanium layer on the silicon layer; a cathode and an anode on any of the silicon layer and the germanium layer; and a plurality of contacts on the germanium layer, in addition to the cathode and the anode. The silicon layer can include a highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region, and the cathode and the anode are each at a respective a highly doped region at each end. The germanium layer can include a plurality of highly doped regions with each including one of the plurality of contacts.

First claim

What is claimed is:

1. An avalanche photodiode comprising:
a silicon layer on a substrate including a highly doped region at each end;
a germanium layer on the silicon layer including a plurality of highly doped regions;
a cathode and an anode each on one of the highly doped region at each end of the silicon layer; and
a plurality of contacts each on a corresponding region of the plurality of highly doped regions of the germanium layer, in addition to the cathode and the anode.

2. The avalanche photodiode of claim 1 , wherein the silicon layer includes the highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region.

3. The avalanche photodiode of claim 1 , wherein the highly doped region at one end is N doped and is P doped at another end.

4. The avalanche photodiode of claim 1 , wherein the highly doped region includes a same type of doping at both ends.

5. The avalanche photodiode of claim 1 , wherein the plurality of highly doped regions include an N doped region with a first contact of the plurality of contacts and a P doped region with a second contact of the plurality of contacts.

6. The avalanche photodiode of claim 1 , wherein the plurality of highly doped regions include three doped regions of a same type of doping each with a contact of the plurality of contacts.

7. The avalanche photodiode of claim 1 , wherein the germanium layer includes
a plurality of intermediately doped regions each under a respective one of the plurality of highly doped regions, and
an intrinsic doped region in a middle between each of the plurality of highly doped regions and the plurality of intermediately doped regions.

8. The avalanche photodiode of claim 1 , wherein the plurality of contacts are configured to reverse bias the germanium layer to tune an electric field strength therein so that carriers reach saturation velocity.

9. The avalanche photodiode of claim 1 , wherein a gain of the avalanche photodiode is determined by voltage differences between voltages across the silicon layer and voltages across the germanium layer.

10. The avalanche photodiode of claim 1 , wherein the silicon layer includes an intrinsic doped region in a middle that is configured to receive light from two directions.

11. The avalanche photodiode of claim 1 , wherein the silicon layer includes an intrinsic doped region in a middle with a taper for light coupling.

12. The avalanche photodiode of claim 1 , wherein the plurality of contacts include at least three contacts and at least three applied voltages.

13. The avalanche photodiode of claim 12 , wherein voltage differences between any of the at least three applied voltages are used to i) bias any of the germanium layer and the silicon layer, and ii) to control gain.

14. An avalanche photodiode formed by a process comprising steps of:
with a silicon layer on a substrate, forming a germanium layer on the silicon layer, wherein the germanium layer includes a plurality of high doped regions and the silicon layer includes a highly doped region at each end;
placing a cathode and an anode each on one of the highly doped region at each end of the silicon layer; and
placing a plurality of contacts each on a corresponding region of the plurality of highly dope regions of the germanium layer, in addition to the cathode and the anode.

15. The avalanche photodiode of claim 14 , wherein the silicon layer includes the highly doped region at each end, an intrinsic doped region in a middle, and an intermediately doped region between the highly doped region at each end and the intrinsic doped region.

16. The avalanche photodiode of claim 14 , wherein the germanium layer includes
a plurality of intermediately doped regions each under a respective one of the plurality of highly doped regions, and
an intrinsic doped region in a middle between each of the plurality of highly doped regions and the plurality of intermediately doped regions.

17. The avalanche photodiode of claim 14 , wherein the plurality of contacts is configured to reverse bias the germanium layer to tune an electric field strength therein so that carriers reach saturation velocity.

18. The avalanche photodiode of claim 14 , wherein a gain of the avalanche photodiode is determined by voltage differences between voltages across the silicon layer and voltages across the germanium layer.

Assignees

• Ciena Corp

Inventors

• Samani Alireza
• Vitic Michael
• O'Keefe Sean Sebastian

Classifications

• H10F77/1465

  including only Group IV materials, e.g. Si-SiGe superlattices · CPC title

• H10F71/1215

  comprising at least two Group IV elements, e.g. SiGe · CPC title

• H10F77/147

  Shapes of bodies · CPC title

• H10F77/959

  for devices working in avalanche mode · CPC title

• H10F30/2255 Primary

  in which the active layers form heterostructures, e.g. SAM structures · CPC title