Selective soldering with photonic soldering technology

Patent metadata

Field	Value
Publication number	US-12041728-B2
Application number	US-202117160909-A
Country	US
Kind code	B2
Filing date	Jan 28, 2021
Priority date	Aug 5, 2019
Publication date	Jul 16, 2024
Grant date	Jul 16, 2024

Abstract

Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.

First claim

What is claimed is:

1. An electronic assembly comprising:
a routing substrate including a top side and a bottom side, wherein the routing substrate includes a first compartment opening and a second compartment opening separated by a barrier wall;
an electronic component including a plurality of via openings between a top side and a bottom side of the electronic component;
a corresponding plurality of separate bonding material joints, wherein each bonding material joint is on the top side of the routing substrate and at least partially fills a corresponding via opening of the plurality of via openings; and
a plurality of devices bonded to a bottom side of the electronic component, wherein a first group of the plurality of devices is partitioned from a second group of the plurality of devices by the barrier wall.

2. The electronic assembly of claim 1 , wherein the routing substrate further comprises a plurality of metal landing pads on the top side of the routing substrate, and each bonding material joint is bonded to a corresponding metal landing pad.

3. The electronic assembly of claim 1 , further comprising a corresponding thermally conductive liner along sidewalls of each via opening in the electronic component.

4. The electronic assembly of claim 1 , wherein the electronic component is a second routing substrate.

5. The electronic assembly of claim 4 , wherein the routing substrate is a rigid routing substrate, and the second routing substrate is a second rigid routing substrate.

6. The electronic assembly of claim 5 , wherein the rigid routing substrate includes a plurality of conductive routing layers.

7. The electronic assembly of claim 6 , wherein the second rigid routing substrate includes a plurality of routing layers.

8. The electronic assembly of claim 1 , wherein the electronic component is a top rigid circuit board.

9. The electronic assembly of claim 8 , wherein the routing substrate is an interposer, wherein the bottom side of the interposer is bonded to a bottom rigid circuit board.

10. The electronic assembly of claim 9 , wherein the interposer is bonded to the bottom rigid circuit board with a bottom high temperature solder material characterized by a liquidus temperature of above 217° C.

11. The electronic assembly of claim 10 , wherein each bonding material joint is formed of a top high temperature solder material characterized by a liquidus temperature of above 217° C.

12. The electronic assembly of claim 9 , wherein a majority of the bonding material joints include a top meniscus inside a corresponding via opening, such that the majority of the bonding material joints do not completely fill the corresponding via openings.

13. The electronic assembly of claim 9 , wherein a majority of the bonding material joints completely fill the corresponding via openings.

14. The electronic assembly of claim 9 , wherein the interposer is a laminate substrate including a plurality of conductive routing layers.

15. The electronic assembly of claim 9 , further comprising a second plurality of devices bonded to a top side of the bottom rigid circuit board.

16. The electronic assembly of claim 15 , wherein a first group of the second plurality of devices is partitioned from a second group of the second plurality of devices by the barrier wall.

17. An electronic assembly comprising:
a bottom rigid circuit board;
a first plurality of devices bonded to a top side of the bottom rigid circuit board;
an interposer bonded to the bottom rigid circuit board laterally adjacent to the first plurality of devices;
wherein the interposer includes a first compartment opening and a second compartment opening separated by a barrier wall, wherein a first group of the first plurality of devices is partitioned from a second group of the first plurality of devices by the barrier wall;
a top rigid circuit board bonded to the interposer with a plurality of bonding material joints, wherein the top rigid circuit board includes a plurality of via openings extending completely through the top rigid circuit board, and the plurality of bonding material joints at least partially fill the plurality of via openings.

18. The electronic assembly of claim 17 , further comprising a second plurality of devices bonded to a bottom side of the top rigid circuit board, wherein a first group of the second plurality of devices is partitioned from a second group of the second plurality of devices by the barrier wall.

19. The electronic assembly of claim 17 , wherein a portion of the via openings is located directly over the barrier wall.

20. The electronic assembly of claim 17 , wherein the interposer is bonded to the bottom rigid circuit board with a first high temperature solder material characterized by a liquidus temperature of above 217° C., and each bonding material joint is characterized by a liquidus temperature of above 217° C.

Assignees

• Apple Inc

Inventors

• Rahimi Maryam
• Lee Meng Chi
• Chen Wyeman
• Zhang Leilei
• Marsh Jason P
• Hoang Lan
• Abdollahian Yashar

Classifications

• H10W72/552

  comprising metals or metalloids, e.g. silver · CPC title

• H10W70/682

  comprising holes having chips therein · CPC title

• H10W76/60

  Seals · CPC title

• H10W70/681

  comprising holes not having chips therein, e.g. for outgassing, underfilling or bond wire passage · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title