Amplifier circuit with an output limiter

Patent metadata

Field	Value
Publication number	US-12040754-B2
Application number	US-202117349096-A
Country	US
Kind code	B2
Filing date	Jun 16, 2021
Priority date	Jun 26, 2020
Publication date	Jul 16, 2024
Grant date	Jul 16, 2024

Abstract

An amplifier circuit comprising:an amplifier;an output limiter for providing a variable impedance comprising:a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; anda feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage;wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

First claim

What is claimed is:

1. An amplifier circuit comprising:
an amplifier having an amplifier input terminal and an amplifier output terminal, the amplifier configured to provide an amplifier output signal at the amplifier output terminal based on an amplifier input signal received at the amplifier input terminal;
an output limiter for providing a variable impedance comprising:
a first limiter terminal, a second limiter terminal and an impedance control terminal;
a transistor comprising a conduction channel and a transistor control terminal, wherein the transistor control terminal is coupled to the impedance control terminal;
a first resistor, wherein the first resistor is coupled in parallel with the conduction channel of the transistor; and
a capacitor coupled in series with the conduction channel of the transistor between the conduction channel of one of: (i) the first limiter terminal; and (ii) the second limiter terminal; and

a feedback control unit having a first control unit input terminal coupled to the amplifier output terminal, a second control unit input terminal couplable to a setting voltage and a control unit output terminal coupled to the impedance control terminal wherein the feedback control unit comprises:
a comparator block configured to provide a control signal at the control unit output terminal based on a comparison of the amplifier output signal and the setting voltage; and
a voltage detector having an input connected to the first control unit input terminal and an output connected to an input of the comparator block;

wherein:
the first limiter terminal is coupled to one of: (a) the amplifier input terminal and (b) the amplifier output terminal;
the second limiter terminal is for coupling to a reference node for receiving a reference voltage; and
wherein receipt of the control signal at the transistor control terminal of the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

2. The amplifier circuit of claim 1 wherein the feedback control unit is configured to provide the control signal at the control unit output terminal that decreases the variable impedance of the output limiter in response to the comparison between the amplifier output signal and the setting voltage having a difference or ratio exceeding a predetermined trigger point defined, at least in part, by the setting voltage.

3. The amplifier circuit of claim 1 wherein the comparator block includes negative feedback.

4. The amplifier circuit of claim 1 wherein the comparator block of the feedback control unit comprises an operational amplifier configured to provide the control signal at its output wherein a non-inverting input of the operational amplifier is coupled to the output of the voltage detector and an inverting input is coupled to the second control unit input terminal, and the operational amplifier is configured with negative feedback between the control unit output terminal and the inverting input.

5. The amplifier circuit of claim 1 wherein the second control unit input terminal is configured to set the value of the setting voltage by way of a programmable voltage source.

6. The amplifier circuit of claim 1 wherein the transistor is one of a MOSFET and a bipolar junction transistor.

7. The amplifier circuit of claim 1 wherein the capacitor is coupled between the first limiter terminal and the conduction channel of the transistor.

8. The amplifier circuit of claim 1 wherein the control unit output terminal is coupled to a first terminal of a feedback resistor and a second terminal of the feedback resistor is coupled to the second control unit input terminal.

9. The amplifier circuit of claim 1 , wherein the output limiter incudes a second resistor coupled between the transistor control terminal of the transistor and the impedance control terminal.

10. The amplifier circuit of claim 1 wherein the feedback control unit comprises a third resistor in series between the second control unit input terminal and the comparator block.

11. The amplifier circuit of claim 1 wherein the voltage detector is configured to receive the AC output voltage of the amplifier output terminal and provide a non-alternating voltage to the comparator block.

12. The amplifier circuit of claim 2 wherein the feedback control unit is configured to provide a substantially constant control signal at the control unit output terminal in response to the comparison between the amplifier output signal and the setting voltage having a difference or ratio less than the predetermined trigger point defined, at least in part, by the setting voltage.

13. The amplifier circuit of claim 1 wherein the amplifier comprises a differential cascode amplifier wherein the differential cascode amplifier comprises:
a first branch having a first end couplable to a first cascode reference node and a second end couplable to both a second cascode reference node and a cascode voltage source, the first branch further comprising:
a first cascode transistor having a conduction channel and a control terminal, the conduction channel of the first cascode transistor couplable at a first terminal to the first cascode reference node;
a second cascode transistor having a conduction channel and a control terminal, the conduction channel of the second cascode transistor coupled at a first terminal in series with a second terminal of the conduction channel of the first cascode transistor; and
a first output matching network portion, the first output matching network portion coupled at a first terminal to a second terminal of the conduction channel of the second cascode transistor and a second terminal of the first output matching network portion couplable to the second reference node;

a second branch having a first end couplable to the first cascode reference node and a second end couplable to the second cascode reference node, the second branch further comprising:
a third cascode transistor having a conduction channel and a control terminal, the conduction channel of the third cascode transistor couplable at a first terminal in series with the first cascode reference node;
a fourth cascode transistor having a conduction channel and a control terminal, the conduction channel of the fourth cascode transistor coupled at a first terminal in series with a second terminal of the conduction channel of the third cascode transistor; and
a second output matching network portion, the second output matching network portion coupled at a first terminal to a second terminal of the conduction channel of the fourth cascode transistor and a second terminal of the second output matching network portion couplable to the second reference node,

wherein the control terminals of the second and fourth cascode transistors are coupled together,
wherein the control terminals of the first cascode transistor and the control terminal of the third cascode transistor is coupled to the amplifier input terminal, and
wherein one of the first and second output matching network portions is coupled to the amplifier output terminal.

14. The amplifier circuit of claim 13 wherein the first limiter terminal is coupled to an input matching network comprising:
an input matching network capacitor couplable at a first terminal to a voltage source;
an input matching network reference node couplable to a second terminal of the input matching network capacitor; and
an input matching network inductance element coupled at a first terminal to the first terminal of the input matching network capacitor and a second terminal of the input matching network inductance element c

Assignees

• Nxp Usa Inc

Inventors

• Savary Pierre Pascal
• Thuriés Stephane Damien

Classifications

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/129

  there being a feedback over the complete amplifier · CPC title

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F1/0233

  by using a signal derived from the output signal, e.g. bootstrapping the voltage supply · CPC title