Photonic communication platform

Patent metadata

Field	Value
Publication number	US-12038604-B2
Application number	US-202318526652-A
Country	US
Kind code	B2
Filing date	Dec 1, 2023
Priority date	Mar 6, 2019
Publication date	Jul 16, 2024
Grant date	Jul 16, 2024

Abstract

Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.

First claim

What is claimed is:

1. A photonic system, comprising:
a semiconductor photonic substrate lithographically patterned with a plurality of photonic modules, each photonic module being configured to bond to a respective electronic die of a plurality of electronic dies, each photonic module comprising:
an electrical connection configured to electrically couple the photonic module to electronic circuitry formed on the respective electronic die when the respective electronic die is bonded to the semiconductor photonic substrate;
an optical distribution network configured to selectively route signals among the plurality of electronic dies when the electronic dies are bonded to the semiconductor photonic substrate;
a waveguide optically coupling the optical distribution network to a waveguide of a neighboring photonic module that is adjacent to the photonic module; and
a plurality of transistors, wherein the waveguide and the plurality of transistors are embedded in a common material layer.

2. The photonic system of claim 1 , wherein the photonic modules are copies of each other.

3. The photonic system of claim 1 , wherein the waveguide of the photonic module is physically connected to the waveguide of the neighboring photonic module.

4. The photonic system of claim 1 , wherein a gap is defined between the waveguide of the photonic module and the waveguide of the neighboring photonic module, wherein the waveguide of the photonic module and the waveguide of the neighboring photonic module are optically coupled to each other across the gap.

5. The photonic system of claim 1 , wherein a first photonic module of the plurality of photonic modules is configured to bond to a processor die and a second photonic module of the plurality of photonic modules is configured to bond to a memory die.

6. The photonic system of claim 1 , wherein at least one photonic module of the plurality of photonic modules is configured to bond to a vertically stacked memory.

7. The photonic system of claim 1 , wherein at least one photonic module of the plurality of photonic modules is configured to bond to more than one electronic die.

8. The photonic system of claim 1 , wherein the photonic modules are arranged in a 2-dimensional grid.

9. The photonic system of claim 1 , wherein each photonic module further comprises a transceiver optically coupled to the optical distribution network, the transceiver comprising an optical-to-electrical converter and an electrical-to-optical converter.

10. The photonic system of claim 9 , wherein the optical-to-electrical converter and the electrical-to-optical converter are configured to couple to the electronic circuitry formed on the respective electronic die when the respective electronic die is bonded to the semiconductor photonic substrate.

11. A computing system, comprising:
a plurality of electronic dies comprising at least a processor die and a first memory die; and
a semiconductor photonic substrate lithographically patterned with a plurality of photonic modules, wherein the plurality of photonic modules comprise at least first and second photonic modules that are adjacent to each other, wherein the processor die is mounted on the first photonic module and the first memory die is mounted on the second photonic module, wherein the first photonic module comprises:
an electrical connection electrically coupling the first photonic module to electronic circuitry formed on the processor die;
an optical distribution network configured to selectively route signals between the processor die and other electronic dies of the plurality of electronic dies;
a waveguide optically coupling the optical distribution network to a waveguide of the second photonic module; and
a plurality of transistors, wherein the waveguide and the plurality of transistors are embedded in a common material layer.

12. The computing system of claim 11 , wherein the plurality of electronic dies further comprise a second memory die and the plurality of photonic modules further comprise a third photonic module, wherein the second memory die is mounted on the third photonic module, and wherein the optical distribution network of the first photonic module is configured to selectively route signals between the processor die and either the first memory die or the second memory die.

13. The computing system of claim 11 , wherein the photonic modules are copies of each other.

14. The computing system of claim 11 , wherein the waveguide of the first photonic module is physically connected to the waveguide of the second photonic module.

15. The computing system of claim 11 , wherein a gap is defined between the waveguide of the first photonic module and the waveguide of the second photonic module, wherein the waveguide of the first photonic module and the waveguide of the second photonic module are optically coupled to each other across the gap.

16. The computing system of claim 11 , wherein the photonic modules are arranged in a 2-dimensional grid.

17. The computing system of claim 11 , wherein each photonic module further comprises a transceiver optically coupled to the optical distribution network, the transceiver comprising an optical-to-electrical converter and an electrical-to-optical converter.

18. The computing system of claim 17 , wherein the optical-to-electrical converter and the electrical-to-optical converter are coupled to the electronic circuitry formed on the processor die.

19. The photonic system of claim 1 , wherein the waveguide and the plurality of transistors are formed in a common silicon layer.

20. The computing system of claim 11 , wherein the waveguide and the plurality of transistors are formed in a common silicon layer.

Assignees

• Lightmatter Inc

Inventors

• Harris Nicholas C
• Ramey Carl
• Gould Michael
• Graham Thomas
• Bunandar Darius
• Braid Ryan
• Tymchenko Mykhailo

Classifications

• H10P76/2042

  using lasers · CPC title

• H04J14/0307

  Multiplexers; Demultiplexers · CPC title

• H04J14/02

  Wavelength-division multiplex systems · CPC title

• G02B6/136

  by etching · CPC title

• G02B6/12007

  forming wavelength selective elements, e.g. multiplexer, demultiplexer · CPC title