Combination scheme for baseline wander, direct current level shifting, and receiver linear equalization for high speed links

US12034440B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12034440-B2
Application numberUS-202117566199-A
CountryUS
Kind codeB2
Filing dateDec 30, 2021
Priority dateNov 4, 2021
Publication dateJul 9, 2024
Grant dateJul 9, 2024

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

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Systems, apparatuses, and methods for implementing a combo scheme for direct current (DC) level shifting of signals are disclosed. A receiver circuit receives an input signal on a first interface. The first interface is coupled to a resistor in parallel with a capacitor which passes the input signal to a second interface. Also, the first interface is coupled to a first pair of current sources between ground and a voltage source, and the second interface is coupled to a second pair of current sources between ground and the voltage source. An op-amp drives the current sources based on a difference between a sensed common mode voltage and a reference voltage. Based on this circuit configuration, the receiver circuit is able to prevent baseline wander, perform a DC level shift of the input signal, and achieve linear equalization of the input signal.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a first interface configured to receive a first input signal from a transmission line; a circuit coupled to the first interface and configured to generate an output signal as a baseline wander corrected version of the first input signal, wherein the circuit comprises: a resistor-capacitor parallel arrangement; and one or more current sources connected to a first end of the resistor-capacitor parallel arrangement; and one or more current sources connected to a second end of the resistor-capacitor parallel arrangement, wherein each current source on each of the first end and the second end is configured to receive a control signal based on a sensed common mode voltage of the first input signal and a second input signal different from the first input signal; and a second interface configured to receive the output signal from the circuit. 2. The apparatus as recited in claim 1 , wherein the circuit comprises: a first resistor of the resistor-capacitor parallel arrangement, wherein a first leg of the first resistor is coupled to the first interface, wherein a second leg of the first resistor is coupled to the second interface; a first capacitor of the resistor-capacitor parallel arrangement, wherein a first leg of the first capacitor is coupled to the first interface, wherein a second leg of the first capacitor is coupled to the second interface; a first current source coupled to the first interface; and a second current source coupled to the second interface. 3. The apparatus as recited in claim 2 , wherein the apparatus is further configured to: shift a direct current (DC) level of the first input signal from the first interface to the second interface based on an arrangement of the first resistor, the first capacitor, the first current source, and the second current source; and perform linear equalization at relatively low frequencies based on the arrangement of the first resistor, the first capacitor, the first current source, and the second current source. 4. The apparatus as recited in claim 3 , wherein the circuit further comprises an operational amplifier configured to: generate the control signal by comparing a desired common mode reference voltage and the sensed common mode voltage of the first input signal and the second input signal, wherein each of the first input signal and the second input signal is one of a positive signal and a negative signal of a differential signal; and drive the first current source and the second current source. 5. The apparatus as recited in claim 4 , wherein the circuit further comprises: a third current source, wherein a first leg of the third current source is coupled to the first interface; and a fourth current source, wherein a first leg of the fourth current source is coupled to the second interface. 6. The apparatus as recited in claim 5 , wherein: a second leg of the first current source is coupled to a voltage supply; a second leg of the second current source is coupled to ground; a second leg of the third current source is coupled to ground; a second leg of the fourth current source is coupled to the voltage supply; and the operational amplifier is configured to drive the third current source and the fourth current source. 7. The apparatus as recited in claim 6 , wherein the operational amplifier is further configured to: receive, on a first input leg, a common mode voltage on the first interface; receive, on a second input leg, a reference voltage for the second interface; and generate the control signal to drive the first current source, the second current source, the third current source, and the fourth current source based on a difference between voltages on the first input leg and the second input leg. 8. A method comprising: receiving, by a first circuit, a first input signal from a transmission line on a first signal path and a second input signal different from the first input signal on a second signal path; providing, by one or more first current sources, current to or sinking current from the first signal path; providing, by one or more second current sources, current to or sinking current from the second signal path; passing, to a third signal path from the first signal path, the first input signal through a first resistor-capacitor parallel arrangement; providing, by one or more third current sources, current to or sinking current from the third signal path; passing, to a fourth signal path from the second signal path, the second input signal through a second resistor-capacitor parallel arrangement, wherein each current source on either end of the first resistor-capacitor parallel arrangement and each current source on either end of the second resistor-capacitor parallel arrangement is configured to receive a given control signal based on a sensed common mode voltage of the first input signal and a second input signal; providing, by one or more fourth current sources, current to or sinking current from the fourth signal path; and providing, on the third and fourth signal paths, an output version of the first input signal and the second input signal to a second circuit. 9. The method as recited in claim 8 , further comprising: receiving, by an amplifier, the sensed common mode voltage on a first leg, wherein each of the first input signal and the second input signal is one of a positive signal and a negative signal of a differential signal; receiving, by the amplifier, a desired common mode reference voltage on a second leg; generating the given control signal based on the sensed common mode voltage and the desired common mode reference voltage; and driving the given control signal to each of the one or more first current sources, the one or more second current sources, the one or more third current sources, and the one or more fourth current sources. 10. The method as recited in claim 8 , wherein the one or more first current sources comprise: a first given current source with a first leg coupled to a supply voltage and a second leg coupled to the first signal path; and a second given current source with a first leg coupled to the first signal path and a second leg coupled to ground. 11. The method as recited in claim 8 , wherein the one or more second current sources comprise: a first given current source with a first leg coupled to a supply voltage and a second leg coupled to the second signal path; and a second given current source with a first leg coupled to the second signal path and a second leg coupled to ground. 12. The method as recited in claim 8 , wherein the one or more third current sources comprise: a first given current source with a first leg coupled to a supply voltage and a second leg coupled to the third signal path; and a second given current source with a first leg coupled to the third signal path and a second leg coupled to ground. 13. The method as recited in claim 8 , wherein the one or more fourth current sources comprise: a first given current source with a first leg coupled to a supply voltage and a second leg coupled to the fourth signal path; and a second given current source with a first leg coupled to the fourth signal path and a second leg coupled to ground. 14. The method as recited in claim 8 , wherein the second circuit is a receiver front-end circuit. 15. A system comprising: a first resistor comprising: a first leg connected to a first line of a first interface configured to receive a first input signal from a transmission line; and a second leg connected to a first line of a second interface; a first

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Classifications

  • using IC blocks as the active amplifying circuit · CPC title

  • Interface arrangements · CPC title

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What does patent US12034440B2 cover?
Systems, apparatuses, and methods for implementing a combo scheme for direct current (DC) level shifting of signals are disclosed. A receiver circuit receives an input signal on a first interface. The first interface is coupled to a resistor in parallel with a capacitor which passes the input signal to a second interface. Also, the first interface is coupled to a first pair of current sources b…
Who is the assignee on this patent?
Advanced Micro Devices Inc
What technology area does this patent fall under?
Primary CPC classification H03K19/017509. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).