Display panel and preparation method thereof

Patent metadata

Field	Value
Publication number	US-12033994-B2
Application number	US-202117204562-A
Country	US
Kind code	B2
Filing date	Mar 17, 2021
Priority date	Aug 25, 2020
Publication date	Jul 9, 2024
Grant date	Jul 9, 2024

Abstract

The present application discloses a display panel and a preparation method thereof. The display panel includes a base substrate provided with a circuit area and a light-emitting area; a driving circuit located in the circuit area of the base substrate; an organic insulating layer covering the light-emitting area of the base substrate; a light-emitting element embedded in the organic insulating layer, where an overlap area between the orthographic projection of the light-emitting element on the base substrate and the orthographic projection of the driving circuit on the base substrate is 0; and a first lapping electrode located on the side, facing away from the base substrate, of the light-emitting element, where the light-emitting element is electrically connected to the driving circuit through the first lapping electrode.

First claim

What is claimed is:

1. A display panel, comprising:
a base substrate provided with a circuit area and a light-emitting area;
a driving circuit in the circuit area of the base substrate;
an organic insulating layer covering the light-emitting area of the base substrate;
a light-emitting element embedded in the organic insulating layer, wherein an overlap area between an orthographic projection of the light-emitting element on the base substrate and an orthographic projection of the driving circuit on the base substrate is 0, and the light-emitting element comprises a bottom surface facing the base substrate, a top surface facing away from the base substrate, and side surfaces between the bottom surface and the top surface; wherein the bottom surface and the side surfaces are in direct contact with the organic insulating layer, the light-emitting element is provided with a first electrode at a side, facing away from the base substrate, of the light-emitting element;
a first lapping electrode on the side, facing away from the base substrate, of the light-emitting element, wherein the light-emitting element is electrically connected to the driving circuit through the first lapping electrode; and
an interlayer insulating layer between a film layer in which the first lapping electrode is located and the light-emitting element, wherein the interlayer insulating layer is in direct contact with the top surface and is made of an inorganic material;
wherein the organic insulating layer further covers the circuit area; and
the driving circuit comprises an active layer, a gate insulating layer and a gate sequentially stacked on the base substrate, and wherein
the light-emitting element is electrically connected to the first lapping electrode through at least one first via hole penetrating through the interlayer insulating layer;
the first lapping electrode is electrically connected to the active layer through a second via hole penetrating through the interlayer insulating layer and the organic insulating layer;
a position at which the first electrode is electrically connected to the first lapping electrode is external to the organic insulating layer; and
the organic insulating layer, which is in direct contact with the bottom surface and the side surfaces and through which the second via hole penetrates, is a continuously distributed single film made of a same organic material.

2. The display panel of claim 1 , further comprising: a buffer layer located between the base substrate and the driving circuit, a common electrode layer located between the buffer layer and the base substrate, and a light-shielding metal layer located between the common electrode layer and the base substrate; and
further comprising: a second lapping electrode arranged on the same layer as the first lapping electrode; wherein
the light-emitting element is further provided with a second electrode at the side, facing away from the base substrate, of the light-emitting element,
the first electrode is electrically connected to the first lapping electrode through one of the at least one first via hole penetrating through the interlayer insulating layer,
the second electrode is electrically connected to the second lapping electrode through another one of the at least one first via hole penetrating through the interlayer insulating layer, and
the second lapping electrode is electrically connected to the common electrode layer through a third via hole sequentially penetrating through the interlayer insulating layer, the organic insulating layer and the buffer layer.

3. The display panel of claim 2 , further comprising:
a passivation layer located on a side, facing away from the base substrate, of the first lapping electrode, and
a pixel electrode located on a side, facing away from the base substrate, of the passivation layer, wherein the pixel electrode is electrically connected to the second lapping electrode through a fourth via hole penetrating through the passivation layer.

4. The display panel of claim 1 , wherein a thickness of the organic insulating layer is greater than half of a thickness of the light-emitting element.

5. The display panel of claim 1 , wherein the display panel comprises a plurality of light-emitting elements, and the plurality of light-emitting elements comprise a red light-emitting element, a green light-emitting element and a blue light-emitting element.

6. The display panel of claim 1 , wherein the light-emitting element is pressed into and embedded in the organic insulating layer by bonding and embedding the light-emitting element into the organic insulating layer.

7. The display panel of claim 1 , wherein a thickness of the organic insulating layer is 3 to 5 μm, a the thickness of the light-emitting element is 6 to 8 μm.

8. The display panel of claim 1 , wherein the organic insulating layer is made of a silicon-based resin material or a photosensitive resin material.

9. A preparation method of the display panel of claim 1 , comprising:
forming the driving circuit in the circuit area of the base substrate;
forming the organic insulating layer covering the light-emitting area on the base substrate;
adhering the light-emitting element to a box alignment substrate through pyrolysis adhesives;
aligning and bonding the box alignment substrate with the light-emitting element and the base substrate on which the organic insulating layer is formed through an aligning device, to embed the light-emitting element within the organic insulating layer; wherein the overlap area between the orthographic projection of the light-emitting element on the base substrate and the orthographic projection of the driving circuit on the base substrate is 0;
peeling off the pyrolysis adhesives; and
forming the first lapping electrode on the side, facing away from the base substrate, of the light-emitting element; wherein the light-emitting element is electrically connected to the driving circuit through the first lapping electrode.

10. The preparation method of claim 9 , wherein after forming the organic insulating layer, the preparation method further comprises:
pre-curing the organic insulating layer with a pre-curing temperature being from 100° C. to 120° C., and a time being from 90s to 150s.

11. The preparation method of claim 9 , wherein the peeling off the pyrolysis adhesives comprises:
curing the organic insulating layer with a curing temperature being from 220° C. to 250° C., and a time being from 30 min to 60 min; and
leaving the pyrolysis adhesives to lose adhesion and detach from the light emitting element.

12. The preparation method of claim 9 , wherein the forming the driving circuit in the circuit area of the base substrate comprises:
forming an active layer, a gate insulating layer and a gate on the base substrate in a stacked mode sequentially; and
before forming the first lapping electrode on the side, facing away from the base substrate, of the light-emitting element, the method further comprises:
forming the interlayer insulating layer on the side, facing away from the base substrate, of the light-emitting element; and
etching the interlayer insulating layer and the organic insulating layer to electrically connect the light-emitting element to the first lapping electrode through at least one first via hole penetrating through the interlayer insulating layer, and to electrically connect the first lapping electrode to the active layer through a second via hole penetrating through the interlayer insulating layer and the organic insulating layer.

13. The preparation method of claim 12 , wherein before forming the driving circuit in the circuit

Assignees

• Boe Technology Group Co Ltd

Inventors

• Lv Zhijun
• Zhang Feng
• Dong Liwen
• Liu Wenqu
• Song Xiaoxin
• Cui Zhao
• Meng Detian
• Wang Libo
• Hou Dongfei
• Yao Qi

Classifications

• H10W72/9413

  on encapsulations · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H10W90/732

  between stacked chips · CPC title