Open cavity bridge power delivery architectures and processes

Patent metadata

Field	Value
Publication number	US-12027448-B2
Application number	US-202016828428-A
Country	US
Kind code	B2
Filing date	Mar 24, 2020
Priority date	Mar 24, 2020
Publication date	Jul 2, 2024
Grant date	Jul 2, 2024

Abstract

Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads, and an open cavity. A bridge die is in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, a power delivery bridge pad between the first plurality of bridge pads and the second plurality of bridge pads, and conductive traces. A first die is coupled to the first plurality of substrate pads and the first plurality of bridge pads. A second die is coupled to the second plurality of substrate pads and the second plurality of bridge pads. A power delivery conductive line is coupled to the power delivery bridge pad.

First claim

What is claimed is:

1. An electronic apparatus, comprising:
a package substrate having alternating metallization layers and dielectric layers, the package substrate comprising:
a first plurality of substrate pads and a second plurality of substrate pads; and
an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides;

a bridge die in the open cavity, the bridge die comprising a first plurality of bridge pads, a second plurality of bridge pads, a power delivery bridge pad between the first plurality of bridge pads and the second plurality of bridge pads, and conductive traces;
a first die coupled to the first plurality of substrate pads and the first plurality of bridge pads, wherein an entirety of the power delivery bridge pad is outside of a footprint of the first die;
a second die coupled to the second plurality of substrate pads and the second plurality of bridge pads, the second die coupled to the first die by the conductive traces of the bridge die, wherein the entirety of the power delivery bridge pad is outside of a footprint of the second die; and
a power delivery conductive line coupled to the power delivery bridge pad.

2. The electronic apparatus of claim 1 , further comprising:
an underfill material between the first die and the package substrate, between the first die and the bridge die, between the second die and the package substrate, between the second die and the bridge die, and in the open cavity.

3. The electronic apparatus of claim 2 , further comprising:
a trench in the underfill material between the first die and the second die, wherein the power delivery conductive line is in the trench.

4. The electronic apparatus of claim 1 , wherein the package substrate further comprises a substrate pad outside of a footprint of the first die and the second die, wherein the power delivery conductive line is coupled to the substrate pad outside of the footprint of the first die and the second die.

5. The electronic apparatus of claim 1 , further comprising:
solder structures coupling the bridge die to the bottom of the open cavity.

6. The electronic apparatus of claim 5 , wherein the bottom of the cavity has an exposed metal layer, wherein the bridge die has a first side comprising the first plurality of bridge pads, the second plurality of bridge pads, the power delivery bridge pad, and the conductive traces, and the bridge die having a second side comprising a metallization layer, and wherein the solder structures in contact with the metallization layer of the bridge die and in contact with the exposed metal layer of the bottom of the open cavity.

7. The electronic apparatus of claim 1 , further comprising:
an adhesive layer coupling the bridge die to the bottom of the open cavity.

8. The electronic apparatus of claim 1 , wherein the first die is coupled to the first plurality of substrate pads and the first plurality of bridge pads by a first plurality of solder structures, and the second die is coupled to the second plurality of substrate pads and the second plurality of bridge pads by a second plurality of solder structures.

9. The electronic apparatus of claim 1 , further comprising:
a board coupled to a side of the package substrate opposite the first die and the second die.

10. The electronic apparatus of claim 1 , wherein adjacent pads of the first plurality of bridge pads and adjacent pads of the second plurality of bridge pads have a first pitch, and wherein adjacent pads of the first plurality of substrate pads and adjacent pads of the second plurality of substrate pads have a second pitch greater than the first pitch.

11. The electronic apparatus of claim 10 , wherein the first pitch is less than approximately 100 μm and the second pitch is greater than approximately 100 μm.

Assignees

• Intel Corp
• Intel Corp

Inventors

• Karhade Omkar
• Modi Mitul
• Agraharam Sairam
• Deshpande Nitin
• Raorane Digvijay

Classifications

• H10W70/618

  the bridge chips being embedded in the package substrates, interposers or redistribution layers · CPC title

• H10W70/411

  Chip-supporting parts, e.g. die pads · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10W70/682

  comprising holes having chips therein · CPC title