Low capacitance transient voltage suppressor with a mos-triggered silicon controlled rectifier as high-side steering diode

Patent metadata

Field	Value
Publication number	US-12021075-B2
Application number	US-202318305326-A
Country	US
Kind code	B2
Filing date	Apr 22, 2023
Priority date	Oct 26, 2018
Publication date	Jun 25, 2024
Grant date	Jun 25, 2024

Abstract

A transient voltage suppressor (TVS) device includes a MOS-triggered silicon controlled rectifier (SCR) as the high-side steering diode and a silicon controlled rectifier (SCR) for the low-side steering diode. In one embodiment, the MOS-triggered SCR includes alternating p-type and n-type regions and a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on. In one embodiment, the SCR of the low-side steering diode includes alternating p-type and n-type regions where the p-type region adjacent the n-type region forming the cathode terminal is not biased to any electrical potential.

First claim

What is claimed is:

1. A transient voltage suppressing (TVS) device comprising:
a first high-side steering diode having an anode terminal coupled to a first protected node and a cathode terminal, wherein the first high-side steering diode comprises a MOS-triggered silicon controlled rectifier including alternating p-type and n-type regions, the outermost p-type region forming the anode terminal and the outermost n-type region forming the cathode terminal, the MOS-triggered silicon controlled rectifier further including a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on; and
a first low-side steering diode having a cathode terminal coupled to the first protected node and an anode terminal, wherein the first low-side steering diode comprises a silicon controlled rectifier including alternating p-type and n-type regions, the outermost p-type region forming the anode terminal and the outermost n-type region forming the cathode terminal, the p-type region adjacent the n-type region forming the cathode terminal being not biased to any electrical potential.

2. The TVS device of claim 1 , wherein the TVS device is fabricated on a semiconductor layer comprising at least a first epitaxial layer of a first conductivity type, the semiconductor layer including a plurality of active regions formed in the semiconductor layer, the active regions being isolated from each other by isolation structures, the first high-side steering diode being formed in a first active region and the first low-side steering diode being formed in a second active region, wherein the MOS-triggered silicon controlled rectifier of the first high-side steering diode formed in the first active region comprises:
a first doped region of a second conductivity type, opposite the first conductivity type, formed in the first epitaxial layer;
a second doped region of the second conductivity type formed in the first epitaxial layer and being spaced apart from the first doped region, the second doped region having a lower doping level than the doping level of the first doped region;
a third doped region of the first conductivity type formed at least partially in the second doped region;
a fourth doped region of the first conductivity type formed in the second doped region and spaced apart from the third doped region; and
a conductive gate formed above the semiconductor layer and insulated from the semiconductor layer by a gate dielectric layer, the conductive gate being positioned between the third doped region and the fourth doped region,
wherein the conductive gate, the third doped region and the fourth doped region form a MOS transistor with the second doped region being the body of the MOS transistor, the third doped region being electrically connected to the conductive gate to form a diode-connected MOS transistor.

3. The TVS device of claim 2 , wherein the first doped region, the first epitaxial layer, the second doped region and the fourth doped region form the silicon controlled rectifier, the diode-connected MOS transistor being turned on to trigger the silicon controlled rectifier to turn on.

4. The TVS device of claim 2 , wherein the second doped region has a doping level higher than the doping level of the first epitaxial layer and lower than the doping level of the first doped region.

5. The TVS device of claim 2 , wherein a threshold voltage of the MOS transistor is adjusted to adjust a breakdown voltage of the TVS device.

6. The TVS device of claim 5 , wherein a surface doping level of the second doped region is selected to adjust the threshold voltage of the MOS transistor.

7. The TVS device of claim 2 , wherein the MOS-triggered silicon controlled rectifier of the first high-side steering diode further comprises:
a first well region of the first conductivity type formed in the first epitaxial layer adjacent the third doped region and positioned between the first doped region and the second doped region, the first well region being spaced apart from the first doped region.

8. The TVS device of claim 1 , wherein the silicon controlled rectifier of the first low-side steering diode comprises a punch-through silicon controlled rectifier where the n-type region between the pair of p-type regions is substantially depleted at a bias voltage of zero volt.

9. The TVS device of claim 2 , wherein the silicon controlled rectifier of the first low-side steering diode is formed in the second active region and comprises:
a fifth doped region of the second conductivity type formed in the first epitaxial layer;
a second well region of the second conductivity type formed in the first epitaxial layer spaced apart from the fifth doped region, wherein the second well region is not biased to any electrical potential; and
a sixth doped region of the first conductivity type formed in the second well region,
wherein the fifth doped region, the first epitaxial layer, the second well region and the sixth doped region form the silicon controlled rectifier, the fifth doped region forming the anode and the sixth doped region forming the cathode of the silicon controlled rectifier.

10. The TVS device of claim 9 , wherein the silicon controlled rectifier of the first low-side steering diode comprises a punch-through silicon controlled rectifier where the n-type region between the pair of p-type regions is substantially depleted at a bias voltage of zero volt.

11. The TVS device of claim 10 , wherein a portion of the first epitaxial layer between the fifth doped region and the second well region being depleted at a bias voltage of zero volt.

12. The TVS device of claim 9 , wherein the silicon controlled rectifier of the first low-side steering diode further comprises:
a seventh doped region of the second conductivity type formed in the second well region and spaced apart from the sixth doped region, wherein the seventh doped region is not biased to any electrical potential.

13. The TVS device of claim 9 , wherein the silicon controlled rectifier of the first low-side steering diode further comprises:
a third well region of the first conductivity type formed in the first epitaxial layer adjacent the second well region and positioned between the fifth doped region and the second well region.

14. The TVS device of claim 2 , wherein the first conductivity type comprises N-type conductivity and the second conductivity type comprises P-type conductivity.

15. The TVS device of claim 2 , wherein the semiconductor layer further comprises a second epitaxial layer of the second conductivity type and a first buried layer of the first conductivity type formed on the second epitaxial layer, wherein the first epitaxial layer is formed on the first buried layer.

16. The TVS device of claim 15 , wherein the isolation structures comprises a plurality of trench isolation structures isolating the active regions, each trench isolation structures extending from the first epitaxial layer to the second epitaxial layer.

17. The TVS device of claim 1 , wherein the cathode terminal of the first high-side steering diode and the anode terminal of the first low-side steering diode are connected to a ground potential, the TVS device being a unidirectional TVS device.

18. The TVS device of claim 1 , wherein the TVS device comprises a bidirectional TVS device and the bidirectional TVS device further comprises:
a second high-side steering diode having an anode terminal coupled to a second protected node and a cathode terminal, wherein the second high-side steering diode comprises a MOS-triggere

Assignees

• Alpha & Omega Semiconductor Cayman Ltd

Inventors

• Mallikarjunaswamy Shekar

Classifications

• H10D62/129

  Cathode regions of diodes · CPC title

• H10D89/713

  including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices · CPC title

• H10D84/221

  of only diodes · CPC title

• H10D8/021

  of breakdown diodes · CPC title

• H10D8/00 Primary

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title