Display panel, including recess pattern in hole area, electronic apparatus including the same, and method for manufacturing display panel

US12010866B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12010866-B2
Application numberUS-201917256826-A
CountryUS
Kind codeB2
Filing dateApr 15, 2019
Priority dateJun 29, 2018
Publication dateJun 11, 2024
Grant dateJun 11, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes a base substrate, in which a hole area, an active area surrounding the hole area, and a peripheral area adjacent to the active area are defined, a circuit layer including a first circuit insulating layer on the base substrate, a second circuit insulating layer on the first circuit insulating layer, and a thin film transistor on the active area, a display layer including a first display insulating layer on the circuit layer, a second display insulating layer on the first display insulating layer, and a light emitting element on the active area and connected to the thin film transistor, a guide pattern on the circuit layer between the light emitting element and the groove part, and an encapsulation layer which covers the light emitting element and including first and second inorganic layers and an organic layer. The organic layer covers at least a portion of the guide pattern.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display panel comprising: a base substrate including a front surface and a rear surface, wherein a hole area, an active area surrounding the hole area, and a peripheral area adjacent to the active area are defined in the base substrate, and a through-hole defined through the base substrate from the front surface to the rear surface and a groove part surrounding the through-hole and recessed from the front surface are defined in the hole area; a circuit layer comprising a first circuit insulating layer disposed on the base substrate, a second circuit insulating layer disposed on the first circuit insulating layer, and a thin film transistor disposed on the active area; a display layer comprising a first display insulating layer disposed on the circuit layer, a second display insulating layer disposed on the first display insulating layer, and a light emitting element disposed on the active area and connected to the thin film transistor; a guide pattern disposed on the circuit layer and disposed between the active area and the through-hole; and an encapsulation layer which covers the light emitting element, wherein the encapsulation layer comprises a first inorganic layer disposed on the active area and the hole area, a second inorganic layer disposed on the first inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer, wherein the organic layer covers at least a portion of the guide pattern in a plan view. 2. The display panel of claim 1 , wherein the guide pattern is a recess pattern defined in the first display insulating layer or the second display insulating layer. 3. The display panel of claim 2 , wherein the guide pattern passes through the second display insulating layer and is recessed from a top surface of the first display insulating layer on a cross-section. 4. The display panel of claim 2 , wherein the guide pattern is defined in the second display insulating layer and spaced apart from the first display insulating layer. 5. The display panel of claim 2 , wherein the guide pattern comprises: a first guide pattern defined in the second display insulating layer and recessed from a top surface of the second display insulating layer; and a second guide pattern defined in the first display insulating layer and recessed from a top surface of the first display insulating layer, wherein the first guide pattern and the second guide pattern are spaced apart from each other when viewed on a plane. 6. The display panel of claim 1 , wherein the guide pattern is a pattern disposed on the second circuit insulating layer and spaced apart from the first display insulating layer or the second display insulating layer when viewed on a plane. 7. The display panel of claim 6 , wherein the guide pattern comprises the same material as the first display insulating layer or the second display insulating layer. 8. The display panel of claim 1 , wherein the guide pattern comprises a plurality of island patterns spaced apart from each other when viewed on a plane. 9. The display panel of claim 8 , wherein the island patterns are radially aligned from a center of the through-hole. 10. The display panel of claim 8 , wherein the island patterns are randomly arranged. 11. The display panel of claim 1 , wherein the guide pattern has a closed line shape surrounding the groove part when viewed on a plane. 12. The display panel of claim 11 , wherein the closed line shape comprises at least one selected from a circle, an ellipse, and a polygonal shape. 13. The display panel of claim 1 , wherein the groove part has an under-cut shape on a cross-section. 14. The display panel of claim 1 , wherein the groove part comprises: a first groove part adjacent to the through-hole; and a second groove part disposed between the first groove part and the guide pattern to surround the first groove part, wherein each of an inner surface of the first groove part and an inner surface of the second groove part is covered by the first inorganic layer. 15. The display panel of claim 14 , wherein, when viewed on a plane, the organic layer overlaps the second groove part and is spaced apart from the first groove part. 16. The display panel of claim 15 , further comprising: a filling pattern disposed at the first groove part and spaced apart from the organic layer to be sealed by the first inorganic layer and the second inorganic layer, wherein the filling pattern comprises a same material as the organic layer. 17. The display panel of claim 14 , wherein, when viewed on a plane, the organic layer overlaps the first groove part and the second groove part. 18. The display panel of claim 1 , further comprising: a dam part disposed between the groove part and the through-hole to surround the groove part, wherein the first inorganic layer covers the dam part. 19. An electronic apparatus comprising: a display panel, in which a through-hole and a groove pattern adjacent to the through-hole are defined, wherein the groove pattern defines a predetermined recessed space; and an electronic module which overlaps the through-hole when viewed on a plane, wherein the display panel comprises: a base substrate; a circuit layer comprising a first circuit insulating layer disposed on the base substrate, a second circuit insulating layer disposed on the first circuit insulating layer, and a thin film transistor disposed on an active area; a display layer comprising a first display insulating layer disposed on the circuit layer, a second display insulating layer disposed on the first display insulating layer, and a light emitting element disposed on the active area and connected to the thin film transistor; a recess pattern disposed between the electronic module and the active area in a plan view and defined in the first display insulating layer or the second display insulating layer; and an encapsulation layer which covers the light emitting element, wherein the encapsulation layer comprises a first inorganic layer disposed on the active area and the recess pattern, a second inorganic layer disposed on the first inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer, wherein at least a portion of the recess pattern is filled with the organic layer. 20. The electronic apparatus of claim 19 , wherein the recess pattern is recessed from a top surface of the second display insulating layer. 21. The electronic apparatus of claim 20 , wherein the recess pattern passes through the second display insulating layer and extends up to the first display insulating layer. 22. The electronic apparatus of claim 19 , wherein the recess pattern is recessed from a top surface of the first display insulating layer and spaced apart from the second display insulating layer when viewed on the plane. 23. The electronic apparatus of claim 19 , wherein the recess pattern is provided in plurality, each of which has an island shape, and the plurality of recess patterns are radially arranged from a center of the through-hole. 24. The electronic apparatus of claim 19 , wherein the recess pattern is provided in plurality, each of which has an island shape, and the plurality of recess patterns are randomly arranged. 25. The electronic apparatus of claim 24 , wherein the display panel further comprises a dam part disposed adjacent to th

Assignees

Inventors

Classifications

  • Interconnections, e.g. wiring lines or terminals · CPC title

  • multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title

  • H10K50/844Primary

    Encapsulations · CPC title

  • H10K59/124Primary

    Insulating layers formed between TFT elements and OLED elements · CPC title

  • Manufacture or treatment · CPC title

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What does patent US12010866B2 cover?
A display panel includes a base substrate, in which a hole area, an active area surrounding the hole area, and a peripheral area adjacent to the active area are defined, a circuit layer including a first circuit insulating layer on the base substrate, a second circuit insulating layer on the first circuit insulating layer, and a thin film transistor on the active area, a display layer including…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/8731. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 11 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).