Deep trench capacitor including a compact contact region and methods of forming the same

US12009405B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12009405-B2
Application numberUS-202117460178-A
CountryUS
Kind codeB2
Filing dateAug 28, 2021
Priority dateAug 28, 2021
Publication dateJun 11, 2024
Grant dateJun 11, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A deep trench capacitor includes at least one deep trench and a layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers and continuously extending over the top surface of a substrate and into each of the at least one deep trench. A contact-level dielectric layer overlies the substrate and the layer stack. Contact assemblies extend through the contact-level dielectric layer. A subset of the contact assemblies vertically extend through a respective metallic electrode layer. For example, a first contact assembly includes a first tubular insulating spacer that laterally surrounds a first contact via structure and contacts a cylindrical sidewall of a topmost metallic electrode layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A deep trench capacitor comprising: a first deep trench and a second deep trench each extending downward from a top surface of a substrate that is located within a first horizontal plane; a layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers, wherein each layer within the layer stack continuously extends over the top surface of the substrate and into each of the first deep trench and the second deep trench, wherein the at least three metallic electrode layers comprise a first metallic electrode layer, a second metallic electrode layer, and a third metallic electrode layer in an order of proximity from the substrate, wherein a topmost surface of the layer stack is located entirely within a second horizontal plane that overlies the first horizontal plane; a dielectric fill material layer comprising: a first horizontally-extending portion that is located within an area of an outer periphery of the topmost surface of the layer stack and is located entirely above the second horizontal plane and laterally extends over entire areas of the first deep trench and the second deep trench; a first vertically-extending portion that vertically extends from the horizontally-extending portion into a central volume of the first deep trench; a second vertically-extending portion that vertically extends from the horizontally-extending portion into a central volume of the second deep trench; and a second horizontally-extending portion that is located outside a region in which the layer stack is present and vertically recessed relative to the first horizontally-extending portion, wherein the topmost surface of the layer stack comprises a surface segment which laterally extends between, and is laterally bounded by, a top edge of the first vertically-extending portion of the dielectric fill material layer and a top edge of the second vertically-extending portion of the dielectric fill material layer and located entirely within the second horizontal plane, wherein an entirety of the surface segment of the topmost surface of the layer stack is in contact with the first horizontally-extending portion of the dielectric fill material layer within the second horizontal plane; a contact-level dielectric layer overlying the substrate, the layer stack, and the dielectric fill material layer and having a horizontal top surface that extends over the first horizontally-extending portion and the second horizontally-extending portion of the dielectric fill material layer; a first contact assembly vertically extending through the contact-level dielectric layer and the first horizontally-extending portion of the dielectric fill material layer, located entirely within an area of said surface segment of the topmost surface of the layer stack, and including a first tubular insulating spacer laterally surrounding a first contact via structure that contacts a horizontal surface of the first metallic electrode layer, wherein the first tubular insulating spacer contacts a first cylindrical sidewall of the first horizontally-extending portion of the dielectric fill material layer, a first cylindrical sidewall of the second metallic electrode layer, and a first cylindrical sidewall of the third metallic electrode layer; a second contact assembly vertically extending through the contact-level dielectric layer and the first horizontally-extending portion of the dielectric fill material layer, located entirely within the area of said surface segment of the topmost surface of the layer stack, and including a second tubular insulating spacer laterally surrounding a second contact via structure that contacts a horizontal surface of the third metallic electrode layer, wherein the second tubular insulating spacer contacts a second cylindrical sidewall of the first horizontally-extending portion of the dielectric fill material layer; and a first metal pad structure comprising a bottom surface that contacts a top surface of the first contact via structure and a top surface of the second contact via structure. 2. The deep trench capacitor of claim 1 , further comprising a third contact assembly located entirely within the area of said surface segment of the topmost surface of the layer stack and including a third tubular insulating spacer laterally surrounding a third contact via structure that contacts a horizontal surface of the second metallic electrode layer, wherein the third tubular insulating spacer contacts a second cylindrical sidewall of the third metallic electrode layer. 3. The deep trench capacitor of claim 2 , wherein the first cylindrical sidewall of the third metallic electrode layer and the second cylindrical sidewall of the third metallic electrode layer are located within a horizontally-extending portion of the third metallic electrode layer, and are vertically spaced from the substrate by a same vertical distance. 4. The deep trench capacitor of claim 2 , wherein: the layer stack includes a fourth metallic electrode layer that is more distal from the substrate than the third metallic electrode layer is from the substrate; and the first tubular insulating spacer contacts a first cylindrical sidewall of the fourth metallic electrode layer. 5. The deep trench capacitor of claim 4 , further comprising: a fourth contact assembly vertically extending through the contact-level dielectric layer, located entirely within the area of said surface segment of the topmost surface of the layer stack, and including a fourth tubular insulating spacer laterally surrounding a fourth contact via structure that contacts a horizontal surface of the fourth metallic electrode layer; and a second metal pad structure comprising a bottom surface that contacts a top surface of the third contact via structure and a top surface of the fourth contact via structure. 6. The deep trench capacitor of claim 1 , wherein: the at least two node dielectric layers comprise a first node dielectric layer and a second node dielectric layer in an order of proximity from the substrate; and the first tubular insulating spacer contacts a cylindrical sidewall of the first node dielectric layer and a cylindrical sidewall of the second node dielectric layer. 7. The deep trench capacitor of claim 1 , wherein the first tubular insulating spacer comprises a straight cylindrical outer sidewall that extends vertically at least from a top surface of the contact-level dielectric layer to the horizontal surface of the first metallic electrode layer. 8. The deep trench capacitor of claim 7 , further comprising a dielectric hard mask layer overlying the contact-level dielectric layer, wherein the straight cylindrical outer sidewall of the first tubular insulating spacer has a top periphery located within a horizontal plane including a top surface of the dielectric hard mask layer. 9. The deep trench capacitor of claim 8 , further comprising: an interconnect-level dielectric layer overlying the dielectric hard mask layer; and the first metal pad structure is embedded in the interconnect-level dielectric layer and contacting a top surface of the first contact via structure and contacting an annular top surface of the first tubular insulating spacer. 10. The deep trench capacitor of claim 1 , wherein sidewalls of all layers within a horizontally-extending portion of the layer stack that overlie the substrate are vertically coincident with one another. 11. The deep trench capacitor of claim 10 , wherein vertical sidewalls of the dielectric fill material layer contact a respective one of the sidewalls of the layers within the horizontally-extending portion of the layer stack. 12.

Assignees

Inventors

Classifications

  • Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors · CPC title

  • having vertical extensions · CPC title

  • comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

  • H10D1/047Primary

    of conductor-insulator-semiconductor capacitors, e.g. trench capacitors · CPC title

  • H10D1/68Primary

    Capacitors having no potential barriers · CPC title

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Frequently asked questions

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What does patent US12009405B2 cover?
A deep trench capacitor includes at least one deep trench and a layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers and continuously extending over the top surface of a substrate and into each of the at least one deep trench. A contact-level dielectric layer overlies the substrate and the layer stack. Contact assemblies extend throu…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D1/047. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 11 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).