Backlight system, display device including the backlight system and method of transferring data in the backlight system

US12008969B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12008969-B2
Application numberUS-202217958835-A
CountryUS
Kind codeB2
Filing dateOct 3, 2022
Priority dateOct 8, 2020
Publication dateJun 11, 2024
Grant dateJun 11, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A backlight system includes a backlight and a master driving circuit. The backlight includes a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits are arranged in a matrix of driving rows and driving columns such that first through m-th slave driving circuits, where m is a positive integer greater than one, are arranged in each driving row of the driving rows, and the first through m-th slave driving circuits are connected in a daisy chain structure. The master driving circuit is configured to generate a plurality of input data signals, wherein each input data signal of the plurality of input data signals corresponds to the each driving row, and the each input data signal includes first through m-th packets including luminance data corresponding to the first through m-th slave driving circuits.

First claim

Opening claim text (preview).

What is claimed is: 1. A slave driving circuit comprising: a shift register configured to store a reception packet by bit-by-bit shifting the reception packet, and output the reception packet; a control circuit configured to generate a latch signal based on a value of a virtual identifier included in the reception packet, and to generate an updated value of the virtual identifier by increasing or decreasing the value of the virtual identifier; a data register configured to latch and store luminance data include in the reception packet based on the latch signal; and a driver configured to drive a light source connected to the slave driving circuit based on the luminance data stored in the data register, wherein the slave driving circuit is configured to generate and output a transmission packet that includes the updated value of the virtual identifier. 2. The slave driving circuit of claim 1 , wherein the control circuit is further configured to compare the value of the virtual identifier with a fixed address, and activate the latch signal when the value of the virtual identifier is identical to the fixed address, and wherein the data register is further configured to latch and store the luminance data included in the reception packet in response to activation of the latch signal. 3. The slave driving circuit of claim 1 , wherein the control circuit is further configured to generate an address selection signal that is activated while the value of the virtual identifier is output from the shift register. 4. The slave driving circuit of claim 3 , further comprising: an address selector configured to select the updated value of the virtual identifier in response to activation of the address selection signal, and select output of the shift register in response to deactivation of the address selection signal to output the transmission packet including the updated value of the virtual identifier. 5. The slave driving circuit of claim 1 , wherein the control circuit includes: an address updater configured to generate the updated value of the virtual identifier; and an address comparator configured to compare the value of the virtual identifier with a fixed address, and activate the latch signal when the value of the virtual identifier is identical to the fixed address. 6. The slave driving circuit of claim 5 , wherein the address updater is further configured to generate an address selection signal that is activated while the value of the virtual identifier is output from the shift register. 7. The slave driving circuit of claim 1 , wherein the control circuit includes: a decoder configured to check an error of the luminance data based on parity bits. 8. The slave driving circuit of claim 1 , wherein the driver includes: a digital-to-analog converter configured to convert digital values of the luminance data stored in the data register to sequentially output voltages corresponding to the digital values; and sampling and holding circuits configured to store the voltages and provide driving currents to the light source connected to the slave driving circuit based on the voltages. 9. The slave driving circuit of claim 1 , further comprising: a monitoring circuit configured to generate a monitoring current indicating a circuit characteristic of the driver. 10. The slave driving circuit of claim 9 , wherein an operational deviation of the slave driving circuit is compensated for based on the monitoring current. 11. The slave driving circuit of claim 1 , wherein the shift register and the driver are further configured to operate based on a clock signal that is provided from a master driving circuit that is external to the slave driving circuit. 12. The slave driving circuit of claim 11 , further comprising: a clock divider configured to divide a frequency of the clock signal to provide a divided clocks signal to the driver. 13. The slave driving circuit of claim 1 , further comprising: an oscillator configured to generate an oscillation signal, wherein the driver is further configured to operate based on the oscillation signal. 14. The slave driving circuit of claim 1 , wherein the shift register is further configured to operate based on a first clock signal that is provided through a first clock pin, and the driver is further configured to operate based on a second clock signal that is provided through a second clock pin. 15. A backlight included in a backlight system, comprising: a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits are arranged in a matrix of driving rows and driving columns such that first through m-th slave driving circuits, where m is a positive integer greater than one, are arranged in each driving row of the driving rows, and the first through m-th slave driving circuits are connected in a daisy chain structure, wherein a master driving circuit included in the backlight system is configured to generate a plurality of input data signals, wherein each input data signal of the plurality of input data signals corresponds to the each driving row, and the each input data signal includes first through m-th packets including luminance data corresponding to the first through m-th slave driving circuits, wherein each packet of the first through m-th packets includes a virtual identifier, and wherein the virtual identifier is sequentially decreased or sequentially increased as the each packet passes through the daisy chain structure. 16. The backlight of claim 15 , wherein the master driving circuit is further configured to apply the each input data signal to an m-th slave driving circuit of the first through m-th slave driving circuits, and wherein the first through m-th slave driving circuits are configured to transfer the each input data signal sequentially from the m-th slave driving circuit to a first slave driving circuit of the first through m-th slave driving circuits. 17. The backlight system of claim 15 , wherein the master driving circuit is further configured to generate the each input data signal such that the first through m-th packets include respective virtual identifiers, and values of the virtual identifiers are sequentially increased or sequentially decreased, and wherein each slave driving circuit of the first through m-th slave driving circuits is configured to increase or decrease a value of a virtual identifier of a reception packet transferred from a latter stage slave driving circuit to transfer a transmission packet including the virtual identifier having the increased or decreased value to a former stage slave driving circuit. 18. The backlight system of claim 17 , wherein the each slave driving circuit is further configured to compare the value of the virtual identifier of the reception packet with a fixed address, and stores the luminance data included in the reception packet when the value of the virtual identifier of the reception packet is identical to the fixed address. 19. The backlight system of claim 15 , wherein the each slave driving circuit of the first through m-th slave driving circuits is further configured to simultaneously latch and store the luminance data corresponding to the each slave driving circuit. 20. A backlight system comprising: a backlight including a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits a

Assignees

Inventors

Classifications

  • Improving the luminance or brightness uniformity across the screen · CPC title

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • Details of sampling or holding circuits arranged for use in a driver for data electrodes · CPC title

  • G09G3/3426Primary

    the different display panel areas being distributed in two dimensions, e.g. matrix · CPC title

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Frequently asked questions

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What does patent US12008969B2 cover?
A backlight system includes a backlight and a master driving circuit. The backlight includes a plurality of slave driving circuits and a plurality of light sources driven by the plurality of slave driving circuits, wherein the plurality of slave driving circuits are arranged in a matrix of driving rows and driving columns such that first through m-th slave driving circuits, where m is a positiv…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3426. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 11 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).