Electronic device and method capable of reducing afterimage of display

Patent metadata

Field	Value
Publication number	US-12008956-B2
Application number	US-202318351110-A
Country	US
Kind code	B2
Filing date	Jul 12, 2023
Priority date	Feb 9, 2021
Publication date	Jun 11, 2024
Grant date	Jun 11, 2024

Abstract

An electronic device and a method capable of reducing an afterimage of a display are provided. The method includes the operations of where a display panel is divided into a first area and a second area, in response to a specified event, controlling a display panel in a partial display state in which a first area is deactivated and a second area is activated, while the display panel is in the partial display state, dividing each frame into a first sub-period and a second sub-period, and controlling first pixels corresponding to the first area, controlling the first pixels to receive a data voltage corresponding to an inactive state, by supplying the first gate signal to the first pixels in the first sub-period, and controlling the first pixels to receive a bias voltage, by supplying the first gate signal to the first pixels in the second sub-period.

First claim

What is claimed is:

1. An electronic device comprising:
a housing;
a display in which a display panel including a plurality of pixels is divided into a first area and a second area;
a display driver integrated circuit (DDI) for driving the display panel; and
at least one processor,
wherein each of the plurality of pixels comprises:
a first thin film transistor (TFT),
a second TFT for switching a connection between a data line of the display panel to which a data voltage is supplied and a source of the first TFT based on a first gate signal,
a third TFT for switching a connection between a gate of the first TFT and a drain of the first TFT based on a second gate signal,
a fourth TFT supplying a first initialization voltage to the gate of the first TFT based on a third gate signal,
a fifth TFT for switching a connection between a positive driving voltage line of the display panel to which a positive driving voltage is supplied and the source of the first TFT based on a light emission signal,
a sixth TFT connecting the drain of the first TFT and an anode of an organic light emitting diode (OLED) based on the light emission signal,
a seventh TFT supplying a second initialization voltage to the anode of the OLED based on a fourth gate signal, and
a storage capacitor disposed between the gate of the first TFT and the positive driving voltage line,

wherein the at least one processor controls:
the display panel to be in a partial display state in which the first area is deactivated and the second area is activated in response to a specified event,
first pixels corresponding to the first area by dividing each frame into a first sub-period and a second sub-period while the display panel is controlled to be in the partial display state,
the first pixels to receive a data voltage corresponding to an inactive state through the second TFT by supplying the first gate signal to the first pixels in the first sub-period, and
the first pixels to receive a bias voltage through the second TFT by supplying the first gate signal to the first pixels in the second sub-period, and

wherein the first pixels maintain the first TFT in a bias state by receiving the bias voltage in the second sub-period.

2. The electronic device of claim 1 ,
wherein the bias state is a state in which the difference between a gate voltage of the first TFT and a source voltage of the first TFT is “Vdata+Vth−Vbias”, and
wherein Vdata is a value corresponding to the data voltage, Vth is a threshold voltage of the first TFT, and Vbias is a value corresponding to the bias voltage.

3. The electronic device of claim 2 , wherein the bias voltage is equal to the positive driving voltage.

4. The electronic device of claim 1 further disposing in a non-display area of the display panel:
a first gate driving circuit for supplying the first to fourth gate signals and the light emission signal to first pixels corresponding to the first area;
a second gate driving circuit for supplying the first to fourth gate signals and the light emission signal to second pixels corresponding to the second area;
a first GW start signal line for transferring the first GW start signal output from the DDI to the first gate driving circuit; and
a second GW start signal line for transferring the second GW start signal output from the DDI to the second gate driving circuit.

5. The electronic device of claim 4 ,
wherein the DDI outputs the first GW start signal when the first sub-period starts,
wherein the first gate driving circuit sequentially supplies the first gate signal to the first pixels in response to the first GW start signal input through the first GW start signal line during the first sub-period,
wherein the DDI outputs the first GW start signal when the second sub-period starts, and
wherein the first gate driving circuit sequentially supplies the first gate signal to the first pixels in response to the first GW start signal input through the first GW start signal line during the second sub-period.

6. The electronic device of claim 4 ,
wherein the DDI outputs the second GW start signal when each frame starts, and
wherein the first gate driving circuit sequentially supplies the first gate signal to the second pixels in response to the second GW start signal input through the second GW start signal line.

7. The electronic device of claim 4 further disposing in a non-display area of the display panel:
a first EM start signal line for transferring the first EM start signal output from the DDI to the first gate driving circuit; and
a second EM start signal line for transferring the second EM start signal output from the DDI to the second gate driving circuit.

8. The electronic device of claim 7 ,
wherein the DDI does not output a first EM start signal while the display panel is controlled to be in the partial display state, and
wherein the first gate driving circuit does not supply the light emission signal to the first pixels by not receiving the first EM start signal while the display panel is controlled to be in the partial display state.

9. The electronic device of claim 7 ,
wherein the DDI outputs the second EM start signal when each frame starts, and
wherein the second gate driving circuit sequentially supplies the light emission signal to the second pixels in response to the second EM start signal input through the second EM start signal line.

10. The electronic device of claim 1 ,
wherein a first area of the display slides out of an inner space of the housing in association with movement of at least a portion of the housing in a first direction,
wherein a first area of the display slides into the inner space of the housing in association with movement of at least a portion of the housing in a second direction opposite to the first direction, and
wherein a second area of the display is visually visible from an outside in a fixed manner regardless of the movement of the housing.

11. The electronic device of claim 10 , wherein the specified event comprises an operation of the at least one processor detecting a state in which the first area of the display slides into the inner space of the housing.

12. A method for driving an electronic device including a display in which a display panel including a plurality of pixels is divided into a first area and a second area, the method comprising:
controlling the display panel to be in a partial display state in which the first area is deactivated and the second area is activated in response to a specified event;
controlling first pixels corresponding to the first area by dividing each frame into a first sub-period and a second sub-period while the display panel is controlled to be in the partial display state;
controlling the first pixels to receive a data voltage corresponding to an inactive state by supplying a first gate signal to the first pixels in the first sub-period;
controlling the first pixels to receive a bias voltage by supplying the first gate signal to the first pixels in the second sub-period; and
each of the first pixels maintains a driving thin film transistor (TFT) in a bias state by receiving the bias voltage in the second sub-period.

13. The method of claim 12 ,
wherein the bias state is a state in which the difference between a gate voltage of the driving TFT and a source voltage of the driving TFT is “Vdata+Vth−Vbias”, and
wherein Vdata is a value corresponding to the data voltage, Vth is a threshold voltage of the driving TFT, and Vbias is a value corresponding to the bias voltage.

14. The method of claim 13 , wherein the bias voltage is equal to a positive driving voltag

Assignees

• Samsung Electronics Co Ltd

Inventors

• Bae Jungbae

Classifications

• G09G2354/00

  Aspects of interface with display user · CPC title

• G09G2320/0257

  Reduction of after-image effects · CPC title

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title