Organic light emitting diode display device supporting a partial driving mode

US10861397B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10861397-B2
Application numberUS-201916717795-A
CountryUS
Kind codeB2
Filing dateDec 17, 2019
Priority dateDec 28, 2018
Publication dateDec 8, 2020
Grant dateDec 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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An OLED display device includes a display panel including first and second partial panel regions, a scan driver configured to sequentially apply scan signals to the first and second partial panel regions in a normal driving mode, and to sequentially apply the scan signals to a driven one of the first and second partial panel regions in a partial driving mode, and a data driver configured to apply data signals to the first and second partial panel regions in the normal driving mode, and to apply the data signals to the driven one of the first and second partial panel regions in the partial driving mode. In the partial driving mode, the scan driver is configured to sequentially apply diode initialization signals to the driven one of the first and second partial panel regions, and to concurrently apply the diode initialization signals to a non-driven one of the first and second partial panel regions.

First claim

Opening claim text (preview).

What is claimed is: 1. An organic light emitting diode (OLED) display device comprising: a display panel comprising a first partial panel region and a second partial panel region; a scan driver configured to sequentially apply scan signals to the first and second partial panel regions in a normal driving mode where both of the first and second partial panel regions are driven, and to sequentially apply the scan signals to a driven one of the first and second partial panel regions in a partial driving mode, wherein the driven one of the first and second partial panel regions is driven and a non-driven one of the first and second partial panel regions is not driven; and a data driver configured to apply data signals to the first and second partial panel regions in the normal driving mode, and to apply the data signals to the driven one of the first and second partial panel regions in the partial driving mode, wherein, in the partial driving mode, the scan driver is configured to sequentially apply diode initialization signals to the driven one of the first and second partial panel regions, and to concurrently apply the diode initialization signals to the non-driven one of the first and second partial panel regions. 2. The OLED display device of claim 1 , wherein, in the partial driving mode, OLEDs of pixels included in the non-driven one of the first and second partial panel regions are initialized in response to the concurrently applied diode initialization signals. 3. The OLED display device of claim 1 , wherein, in the partial driving mode, pixels included in the non-driven one of the first and second partial panel regions form leakage current paths from a power supply voltage line to an initialization voltage line in response to the concurrently applied diode initialization signals. 4. The OLED display device of claim 1 , wherein each of the first and second partial panel regions comprises a plurality of pixels, wherein each of the plurality of pixels comprises a diode initialization transistor having a gate for receiving a corresponding one of the diode initialization signals, a first terminal connected to an initialization voltage line, and a second terminal connected to an anode of an OLED, and wherein, in the partial driving mode, the diode initialization transistors of the plurality of pixels included in the non-driven one of the first and second partial panel regions are turned on in response to the concurrently applied diode initialization signals. 5. The OLED display device of claim 4 , wherein the turned-on diode initialization transistors of the plurality of pixels included in the non-driven one of the first and second partial panel regions form discharge paths for discharging parasitic capacitors of OLEDs of the plurality of pixels included in the non-driven one of the first and second partial panel regions to the initialization voltage line, and form leakage current paths for allowing leakage currents of driving transistors to flow to the initialization voltage line. 6. The OLED display device of claim 1 , wherein, in the partial driving mode, the diode initialization signals applied to the non-driven one of the first and second partial panel regions concurrently have an on-level for at least one horizontal time. 7. The OLED display device of claim 1 , wherein, in the partial driving mode, the diode initialization signals applied to the non-driven one of the first and second partial panel regions sequentially have an on-level in a first frame period of the partial driving mode, and are maintained as the on-level until a driving mode of the OLED display device is changed to the normal driving mode. 8. The OLED display device of claim 1 , wherein the first partial panel region comprises first through N-th pixel rows, the second partial panel region comprises (N+1)-th through (N+M)-th pixel rows, and the scan signals comprises first through (N+M)-th scan signals, wherein each of N and M is an integer greater than 1, and wherein the scan driver comprises: a first scan stage configured to apply the first scan signal to the first pixel row in response to a first scan start signal; second through N-th scan stages configured to apply the second through N-th scan signals to the second through N-th pixel rows in response to the first through (N−1)-th scan signals; a scan input control circuit configured to selectively output a second scan start signal or the N-th scan signal in response to a mode control signal; an (N+1)-th scan stage configured to apply the (N+1)-th scan signal to the (N+1)-th pixel row in response to an output signal of the scan input control circuit; and (N+2)-th through (N+M)-th scan stages configured to apply the (N+2)-th through (N+M)-th scan signals to the (N+2)-th through (N+M)-th pixel rows in response to the (N+1)-th through (N+M−1)-th scan signals. 9. The OLED display device of claim 8 , wherein the scan input control circuit comprises: a first scan input control transistor configured to output the N-th scan signal received from the N-th scan stage in response to the mode control signal having an on-level in the normal driving mode; and a second scan input control transistor configured to output the second scan start signal in response to an inverted mode control signal having the on-level in the partial driving mode. 10. The OLED display device of claim 8 , wherein, in the normal driving mode, the mode control signal has an on-level, the first scan start signal comprises a scan start pulse in each frame period, and the second scan start signal has an off-level, wherein, in the partial driving mode, when the first partial panel region is driven and the second partial panel region is not driven, the mode control signal has the off-level, the first scan start signal comprises the scan start pulse in each frame period, and the second scan start signal has the off-level, and wherein, in the partial driving mode, when the first partial panel region is not driven and the second partial panel region is driven, the mode control signal has the off-level, the first scan start signal has the off-level, and the second scan start signal comprises the scan start pulse in each frame period. 11. The OLED display device of claim 1 , wherein the first partial panel region comprises first through N-th pixel rows, the second partial panel region comprises (N+1)-th through (N+M)-th pixel rows, and the diode initialization signals comprises first through (N+M)-th diode initialization signals, wherein each of N and M is an integer greater than 1, and wherein the scan driver comprises: a first diode initialization stage configured to apply the first diode initialization signal to the first pixel row in response to a first diode initialization start signal; second through N-th diode initialization stages configured to apply the second through N-th diode initialization signals to the second through N-th pixel rows in response to the first through (N−1)-th diode initialization signals; a diode initialization input control circuit configured to selectively output a second diode initialization start signal or the N-th diode initialization signal in response to a mode control signal; an (N+1)-th diode initialization stage configured to apply the (N+1)-th diode initialization signal to the (N+1)-th pixel row in response to an output signal of the diode initialization input control circuit; and (N+2)-th through (N+M)-th diode initialization stages configured to apply the (N+2)-th through (N+M)-th diode initialization signals to the (N+2)-th through (N+M)-th pixel rows in response to the (N+1)-th through (N+M−1)-th diode initialization signals. 12. The OLED display

Assignees

Inventors

Classifications

  • with crosstalk due to leakage current of pixel switch in active matrix panels · CPC title

  • with use of split matrices (G09G3/3644 and G09G3/3666 take precedence) · CPC title

  • G09G3/3208Primary

    organic, e.g. using organic light-emitting diodes [OLED] · CPC title

  • with two or more screen areas displaying information with different brightness or colours · CPC title

  • Improving the quality of display appearance · CPC title

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What does patent US10861397B2 cover?
An OLED display device includes a display panel including first and second partial panel regions, a scan driver configured to sequentially apply scan signals to the first and second partial panel regions in a normal driving mode, and to sequentially apply the scan signals to a driven one of the first and second partial panel regions in a partial driving mode, and a data driver configured to app…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3208. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).