Display panel, display panel manufacturing method, and display screen

Patent metadata

Field	Value
Publication number	US-12004401-B2
Application number	US-202117159122-A
Country	US
Kind code	B2
Filing date	Jan 26, 2021
Priority date	Dec 29, 2018
Publication date	Jun 4, 2024
Grant date	Jun 4, 2024

Abstract

A display panel, a display panel manufacturing method, and a display screen are provided. The display panel includes: a substrate, the substrate including a plurality of sub-pixel regions, each of the sub-pixel regions including a first region and a second region, the first region being provided with the substrate, a buffer layer, and a pixel circuit layer, and the second region being provided with the substrate; and a first electrode disposed on the second region of each of the sub-pixel region and directly contacting the substrate. Each sub-pixel region is divided into the first region and the second region, the first region is provided with the substrate, the buffer layer and the pixel circuit layer, the second region is provided with the substrate and the first electrode directly contacting the substrate, and no inorganic film is provided between the first electrode and the substrate.

First claim

What is claimed is:

1. A display panel, comprising:
a substrate;
a plurality of sub-pixel regions disposed on the substrate, each of the sub-pixel regions comprising a first region and a second region, wherein the first region is provided with a buffer layer and a pixel circuit layer disposed on the substrate;
a first electrode, disposed on the substrate corresponding to the second region of each of the sub-pixel regions and directly contacting the substrate corresponding to the second region, wherein the second region comprises a light emitting area and a non-light emitting area, the first electrode is disposed on the light emitting area;
a lead, disposed on the substrate and comprising at least one of a scan line, a data line and a connection line disposed in the pixel circuit layer; and
an inorganic film layer, disposed on the substrate where a projection of the lead is overlapped and comprising at least one of a gate insulation layer, an interlayer insulation layer and the buffer layer.

2. The display panel of claim 1 , wherein the lead is disposed on the non-light emitting area and is in direct contact with the substrate, and/or the inorganic film layer is disposed between the substrate and the lead located on the non-light emitting area.

3. The display panel of claim 2 , wherein the non-light emitting area comprises a lead area for disposing the lead and a non-functional area, and wherein the non-functional area is not covered by the inorganic film layer thereon.

4. The display panel of claim 1 , further comprising:
a flattening layer, arranged on the substrate and from which the lead is exposed.

5. The display panel of claim 1 , wherein the lead comprises a first lead layer and a second lead layer which are stacked.

6. The display panel of claim 5 , wherein the lead is made of a transparent conductive material, and the transparent conductive material has a transmittance of 90% or more, and
wherein the transparent conductive material includes indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide.

7. The display panel of claim 1 , further comprising:
a pixel-defining layer, disposed on the substrate and from which the first electrode is exposed.

8. The display panel of claim 7 , further comprising:
a light-emitting structure layer, a second electrode and an encapsulation layer which are successively stacked on the first electrode; and
wherein the first region comprises a pixel circuit area and a non-pixel circuit area, and the pixel circuit area and/or a light emitting area are covered by the inorganic film layer and an organic film layer.

9. A manufacturing method of a display panel according to claim 1 , comprising following steps:
providing a substrate comprising a plurality of sub-pixel regions, each of the sub-pixel regions comprising a first region and a second region, both of the first region and the second region respectively correspond to the substrate;
disposing a buffer layer and a pixel circuit layer on the substrate corresponding to the first region;
disposing a first electrode on the substrate corresponding to the second region, the first electrode directly contacting the substrate corresponding to the second region;
disposing a lead on the substrate, and disposing an inorganic film layer on the substrate where a projection of the lead is overlapped as an insulation layer among the lead, wherein the inorganic film layer comprises at least one of a gate insulation layer, an interlayer insulation layer and a buffer layer, and the lead comprises at least one of a scan line, a data line and a connection line in the pixel circuit layer.

10. The display panel manufacturing method of claim 9 , wherein the second region comprises a light emitting area and a non-light emitting area, and wherein said disposing a buffer layer and a pixel circuit layer on the substrate in the first region comprises:
disposing on the substrate, covering a first insulation material over the first region and the second region of the substrate;
disposing an active layer on the first insulation material;
disposing on the active layer, covering a second insulation material over the first region and the second region of the substrate;
disposing a gate layer on the second insulation material;
disposing on the gate layer, covering a third insulation material over the first region and the second region of the substrate; and
removing the first insulation material, the second insulation material and the third insulation material in the light emitting area via a first mask.

11. The display panel manufacturing method of claim 10 , wherein the method further comprises: removing the first insulation material, the second insulation material and the third insulation material in the non-light emitting area via the first mask.

12. The display panel manufacturing method of claim 10 , wherein the non-light emitting area comprises a lead area for disposing the lead and a non-functional area, and the method further comprises: removing the first insulation material, the second insulation material and the third insulation material in the non-functional area via the first mask.

13. The display panel manufacturing method of claim 9 , wherein, said disposing providing a buffer layer and a pixel circuit layer on the substrate in the first region further comprises:
disposing a first lead layer on the substrate;
forming a flattening material on the substrate; and
removing the flattening material on the first lead layer via a second mask to expose the first lead layer.

14. The display panel manufacturing method of claim 13 , wherein, said disposing a first electrode on the substrate in the second region comprises:
disposing on the substrate, covering a first conductive material over the first region and the second region; and
patterning the first conductive material to form the first electrode and a second lead layer covering the first lead layer.

15. The display panel manufacturing method of claim 9 , wherein after disposing a first electrode on the substrate in the second region, the method further comprises:
disposing, on the substrate, a pixel-defining layer from which the first electrode is exposed.

16. The display panel manufacturing method of claim 15 , after the step of disposing, on the substrate, a pixel-defining layer, the method further comprising:
disposing a light-emitting structure layer, a second electrode and an encapsulation layer which are successively stacked on the first electrode.

17. The display panel manufacturing method of claim 16 , wherein the first region comprises a pixel circuit area and a non-pixel circuit area, and the method further comprises:
patterning the encapsulation layer, and removing an inorganic film layer and an organic film layer on the non-pixel circuit area and/or a non-light emitting area.

18. A display screen, comprising:
at least a first display region and a second display region, each of the first display region and the second display region being used to display a dynamic or static picture, and a photosensitive device being disposed below the first display region; and
wherein, the first display region is provided with the display panel as defined in claim 1 , and the second display region is provided with a PMOLED display panel or an AMOLED display panel.

Assignees

• Yungu Guan Tech Co Ltd

Inventors

• Liu Rusheng
• Sheng Cuicui
• Xu Lin
• Huang Genmao
• Yuan Bo
• Du Zhe
• Lou Junhui

Classifications

• H10K71/00

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

• H10K59/353 Primary

  characterised by the geometrical arrangement of the RGB subpixels · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K50/844

  Encapsulations · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title