Semiconductor device

Patent metadata

Field	Value
Publication number	US-12002858-B2
Application number	US-202117191554-A
Country	US
Kind code	B2
Filing date	Mar 3, 2021
Priority date	Sep 24, 2020
Publication date	Jun 4, 2024
Grant date	Jun 4, 2024

Abstract

A semiconductor device has a first and a second nitride semiconductor layer and a first and a second electrode thereon. A gate electrode is between the first and second electrodes. A gate field plate is on the gate electrode. A first field plate is above a position between the gate field plate and the second electrode. A second field plate is between the first field plate and the gate field plate. A distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to the portion of the gate field plate that protrudes the most towards the second electrode. The distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to an end surface of the first field plate on a first electrode side.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a first nitride semiconductor layer;
a second nitride semiconductor layer on a surface of the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;
a first electrode on the second nitride semiconductor layer and electrically connected to the first nitride semiconductor layer;
a second electrode on the first nitride semiconductor layer and electrically connected to the first nitride semiconductor layer;
a gate electrode including a planar portion between the first electrode and the second electrode in a first direction parallel to the surface of the first nitride semiconductor layer;
a gate field plate electrode on the gate electrode and electrically connected to the gate electrode, the gate field plate electrode including a central portion directly above the gate electrode in a second direction that is orthogonal to the surface of the first nitride layer;
a first field plate electrode above the second nitride semiconductor layer in the second direction at a position that is between the gate field plate electrode and the second electrode in the first direction, the first field plate electrode being electrically connected to the first electrode; and
a second field plate electrode including an upper planar portion and a projecting portion that extends from the upper planar portion towards the first nitride semiconductor layer in the second direction, the projecting portion being between the first field plate electrode and the gate field plate electrode in the first direction, and electrically connected to the first electrode, wherein
a distance from the first nitride semiconductor layer to a bottom surface of the projecting portion of the second field plate electrode is shorter than a distance from the first nitride semiconductor layer to a bottom surface of an outermost end portion of the gate field plate electrode that protrudes the most in the first direction towards a second electrode side,
the distance from the first nitride semiconductor layer to the bottom surface of the projecting portion of the second field plate electrode is greater than zero but shorter than a distance from the first nitride semiconductor layer to a bottom portion of an end surface of the first field plate electrode on a first electrode side,
the bottom surface of the projecting portion of the second field plate electrode is separated from the second nitride semiconductor layer by an interlayer insulation layer, and
an end portion of the planar portion of the gate electrode is overlapped with the projecting portion of the second field plate electrode in the second direction and between the projecting portion of the second field plate electrode and the second nitride semiconductor layer in the second direction.

2. The semiconductor device according to claim 1 , wherein
a distance from the first nitride semiconductor layer to an upper end surface of the second field plate electrode is longer than a distance from the first nitride semiconductor layer to an upper end surface of the gate field plate electrode on the second field plate electrode side, and
the distance from the first nitride semiconductor layer to the upper end surface of the second field plate electrode is longer than a distance from the first nitride semiconductor layer to an upper end surface of the first field plate electrode.

3. The semiconductor device according to claim 1 , further comprising:
a third field plate electrode above the second field plate electrode in the second direction and electrically connected to the first electrode.

4. The semiconductor device according to claim 3 , wherein the third field plate electrode physically contacts the first electrode.

5. The semiconductor device according to claim 3 , further comprising:
a fourth field plate electrode below the third field plate electrode in the second direction, the fourth field plate electrode being between the first field plate electrode and the second electrode in the first direction and electrically connected to the first electrode.

6. The semiconductor device according to claim 1 , further comprising:
a third field plate electrode between the first field plate electrode and the second electrode in the first direction and electrically connected to the first electrode.

7. A semiconductor device, comprising:
a first nitride semiconductor layer having a first surface;
a second nitride semiconductor layer on the first surface of the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer;
a first electrode above the second nitride semiconductor layer in a first direction orthogonal to the first surface and electrically connected to the first nitride semiconductor layer;
a second electrode above the second nitride semiconductor layer in the first direction and electrically connected to the first nitride semiconductor layer, the second electrode being separated from the first electrode in a second direction parallel to the first surface;
a gate electrode with a planar portion that is between the first electrode and the second electrode in the second direction;
a gate field plate electrode above the planar portion of the gate electrode in the first direction and electrically connected to the gate electrode, the gate field plate electrode including a central portion directly above the planar portion of the gate electrode in the first direction;
a first field plate electrode above the second nitride semiconductor layer in the first direction at a position that is between the gate field plate electrode and the second electrode in the second direction, the first field plate electrode being electrically connected to the first electrode; and
a second field plate electrode including an upper planar portion and a projecting portion that extends from the upper planar portion towards the first nitride semiconductor layer in the first direction, the projecting portion being between the first field plate electrode and the gate field plate electrode in the second direction and electrically connected to the first electrode, wherein
a distance along the first direction from the first nitride semiconductor layer to the projecting portion of the second field plate electrode is greater than zero but shorter than a distance along the first direction from the first nitride semiconductor layer to an end portion of the gate field plate electrode that protrudes the most along the second direction towards the second electrode,
the distance along the first direction from the first nitride semiconductor layer to the projecting portion of the second field plate electrode is shorter than a distance along the first direction from the first nitride semiconductor layer to an end portion of the first field plate electrode on a first electrode side of the first field plate electrode,
a lowermost portion of the second field plate electrode in the first direction is separated from the second nitride semiconductor layer in the first direction by a portion of an interlayer insulating film, and
an end portion of the planar portion of the gate electrode is overlapped with the projecting portion of the second field plate electrode in the first direction and between the projecting portion of the second field plate electrode and the second nitride semiconductor layer in the first direction.

8. The semiconductor device according to claim 7 , further comprising:
a third field plate electrode above the second field plate electrode in the first direction and electrically connected to the first electrode.

9. The semiconductor device according to claim 8 , wherein the third field plate electro

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Ohno Tetsuya
• Yoshioka Akira
• Sugiyama Toru
• Hung Hung
• Isobe Yasuhiro
• Kobayashi Hitoshi

Classifications

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D64/112

  comprising multiple field plate segments · CPC title

• H10D62/102

  Constructional design considerations for preventing surface leakage or controlling electric field concentration · CPC title

• H10D30/475

  having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs · CPC title