Methods and apparatus for via last through-vias

Patent metadata

Field	Value
Publication number	US-11978758-B2
Application number	US-202117166387-A
Country	US
Kind code	B2
Filing date	Feb 3, 2021
Priority date	Apr 18, 2012
Publication date	May 7, 2024
Grant date	May 7, 2024

Abstract

Methods for forming via last through-vias. A method includes providing an active device wafer having a front side including conductive interconnect material disposed in dielectric layers and having an opposing back side; providing a carrier wafer having through vias filled with an oxide extending from a first surface of the carrier wafer to a second surface of the carrier wafer; bonding the front side of the active device wafer to the second surface of the carrier wafer; etching the oxide in the through vias in the carrier wafer to form through oxide vias; and depositing conductor material into the through oxide vias to form conductors that extend to the active carrier wafer and make electrical contact to the conductive interconnect material. An apparatus includes a carrier wafer with through oxide vias extending through the carrier wafer to an active device wafer bonded to the carrier wafer.

First claim

What is claimed is:

1. An imaging device, comprising:
a semiconductor substrate having a first side and a second side;
a photodiode; and
a through structure extending through the semiconductor substrate, the photodiode being electrically connected to the photodiode, the through structure comprising:
a through via extending through the semiconductor substrate,
an insulating material layer within the through via,
through insulating via extending through the insulating material layer in the through via, and
conductive material layer in the through insulating via, wherein a thickness of the insulating material layer between the semiconductor substrate and the conductive material layer continuously increases from a first plane of the first side of the semiconductor substrate to a second plane of the second side of the semiconductor substrate, wherein the conductive material layer protrudes from the second side of the semiconductor substrate and the insulating material layer, wherein an end of the conductive material layer is horizontally level with the first side of the semiconductor substrate.

2. The imaging device of claim 1 , further comprising a first insulating layer on the second side of the semiconductor substrate, wherein the conductive material layer extends continuously through the first insulating layer.

3. The imaging device of claim 1 , wherein a surface of the insulating material layer is level with a surface of the second side of the semiconductor substrate.

4. The imaging device of claim 3 , wherein the through insulating via completely separates the conductive material layer from the semiconductor substrate.

5. The imaging device of claim 1 , wherein a diameter of the conductive material layer at the first plane of the first side of the semiconductor substrate is different than a diameter of the conductive material layer at the second plane of the second side of the semiconductor substrate.

6. The imaging device of claim 1 , wherein the semiconductor substrate is carrier substrate, and the photodiode is on an active substrate bonded to the carrier substrate.

7. The imaging device of claim 1 , wherein the through structure further comprises a dielectric material over the conductive material layer.

8. An imaging device, comprising:
a semiconductor substrate having a first side surface and a second side surface;
a photosensor; and
a through structure including a conductive element and an insulating film, wherein the conductive element is electrically coupled to the photosensor, wherein a surface of the insulating film is horizontally level with the first side surface of the semiconductor substrate, wherein the conductive element protrudes from the first side surface of the semiconductor substrate;
wherein a first thickness of the insulating film between the semiconductor substrate and the conductive element at a first plane of the first side surface of the semiconductor substrate is different than a second thickness of the insulating film between the semiconductor substrate and the conductive element at a second plane of the second side surface of the semiconductor substrate; and
wherein in a cross-sectional view the conductive element has a first sidewall contacting the insulating film and a second sidewall contacting the insulating film, wherein a first distance between the first sidewall and the second sidewall in the first plane is different than a second distance between the first sidewall and the second sidewall in the second plane.

9. The imaging device of claim 8 , wherein the first thickness is greater than the second thickness, wherein the first side surface of the semiconductor substrate is closer to the photosensor than the second side surface of the semiconductor substrate.

10. The imaging device of claim 8 , wherein the conductive element completely fills a region in the insulating film.

11. The imaging device of claim 8 , further comprising an insulating layer, wherein the semiconductor substrate is between the photosensor and the insulating layer, wherein the conductive element extends into the insulating layer.

12. The imaging device of claim 11 , wherein the insulating film is not interposed between a sidewall of the conductive element and the insulating layer.

13. The imaging device of claim 12 , wherein the insulating film directly contacts the insulating layer.

14. The imaging device of claim 8 , wherein the first distance is less than the second distance, wherein the first side surface of the semiconductor substrate is closer to the photosensor than the second side surface of the semiconductor substrate.

15. An imaging device, comprising:
a semiconductor substrate having a first side and a second side;
a photosensor; and
a through electrode structure extending from the first side of the semiconductor substrate to the second side of the semiconductor substrate, the through electrode structure including a conductive layer and an insulating film, the conductive layer protruding from the insulating film and being electrically coupled to the photosensor,
wherein the first side of the semiconductor substrate is horizontally level with a first surface of the insulating film, wherein the first side of the semiconductor substrate and the first surface of the insulating film faces a same direction, and
wherein sidewalls of the insulating film facing the semiconductor substrate are linear from the first side to the second side, wherein a first width of the insulating film at the first side is different than a second width of the insulating film at the second side.

16. The imaging device of claim 15 , wherein the second side of the semiconductor substrate is closer to the photosensor than the first side of the semiconductor substrate.

17. The imaging device of claim 16 , further comprising an insulating layer, wherein the insulating layer is between the semiconductor substrate and the photosensor, wherein the conductive layer extends through the insulating layer.

18. The imaging device of claim 17 , wherein the insulating layer directly contacts sidewalls of the conductive layer.

19. The imaging device of claim 16 , wherein the first width is less than the second width.

20. The imaging device of claim 15 , wherein the photosensor is part of a sensor substrate bonded to the semiconductor substrate.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Szu-Ying
• Chen Pao-Tung
• Yaung Dun-Nian
• Liu Jen-Cheng

Classifications

• H10W20/0265

  characterised by the sidewall insulation · CPC title

• H10W20/216

  characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes · CPC title

• H10W20/0234

  comprising etching via holes that stop on pads or on electrodes · CPC title

• H10W20/0242

  comprising etching via holes from the back sides of the chips, wafers or substrates · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title