Mechanical architecture for a multi-chip module

Patent metadata

Field	Value
Publication number	US-11973004-B2
Application number	US-201917277893-A
Country	US
Kind code	B2
Filing date	Sep 19, 2019
Priority date	Sep 19, 2018
Publication date	Apr 30, 2024
Grant date	Apr 30, 2024

Abstract

Described is a multi-chip module that may include a Redistribution Layer (RDL) substrate having Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate. A second plurality of IC dies may be mounted to an opposite second surface. A plurality of sockets can be mounted upon the second plurality of IC dies and a cold plate then mounted to the first plurality of IC dies. The mounting structure may include socket frames coupled to the plurality of sockets.

First claim

We claim:

1. A multi-chip module comprising:
a Redistribution Layer (RDL) substrate;
a first plurality of Integrated Circuit (IC) dies mounted to a first surface of the RDL substrate;
a second plurality of IC dies mounted to an opposite second surface;
a plurality of sockets mounted upon the second plurality of IC dies;
a cold plate mounted to the first plurality of IC dies; and
a mounting structure comprising:
a plurality of socket frames coupled to the plurality of sockets;
a plurality of holes formed through the RDL substrate;
a plurality of screws extending from the plurality of socket frames through the plurality of holes formed through the RDL substrate and screwed into the cold plate.

2. The multi-chip module of claim 1 , wherein the RDL substrate is formed in a semi-conductor manufacturing process.

3. The multi-chip module of claim 1 , wherein each socket frame of the plurality of socket frames services a single socket.

4. The multi-chip module of claim 1 , wherein each socket frame of the plurality of socket frames services at least two sockets.

5. The multi-chip module of claim 1 , further comprising a plurality of Voltage Regulator Modules (VRMs) mounted into the plurality of sockets.

6. The multi-chip module of claim 1 , wherein the second IC dies comprise embedded capacitor arrays.

7. A method of mounting a multi-chip module to a substrate, comprising:
mounting a plurality of integrated circuit dies onto a first surface of a redistribution layer;
encapsulating the mounted integrated circuit dies;
attaching a floating frames or molded socket, or both onto an integrated circuit on the redistribution layer;
mounting a thermal interface module onto the encapsulated IC dies; and
installing a cold plate directly onto the thermal interface module.

8. The method of claim 7 , further comprising securing the sockets to the substrate with screws.

9. The method of claim 7 , further comprising adding voltage regulator modules onto the substrate.

Assignees

• Tesla Inc

Inventors

• Cao Robert Yinan
• Heschke Mitchell
• Pang Mengzhi
• Sun Shishuang
• Krithivasan Vijaykumar

Classifications

• H10W40/625

  Clamping parts not primarily conducting heat · CPC title

• H10W40/60

  Securing means for detachable heating or cooling arrangements, e.g. clamps · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title