Method and apparatus for estimating aging of integrated circuit

US11972185B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11972185-B2
Application numberUS-202016919157-A
CountryUS
Kind codeB2
Filing dateJul 2, 2020
Priority dateNov 28, 2019
Publication dateApr 30, 2024
Grant dateApr 30, 2024

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of estimating aging of an integrated circuit (IC) includes: obtaining a first process design kit (PDK) including a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; obtaining values of aging parameters of device instances included in a netlist defining the IC, by performing a first circuit simulation based on the netlist and the first PDK; and obtaining aging data of the IC by performing a second circuit simulation based on the values of the aging parameters and the netlist, wherein each of the plurality of first device models includes at least one measurement command to be executed in the first circuit simulation to calculate an aging parameter.

First claim

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What is claimed is: 1. A system for estimating aging of an integrated circuit (IC), the system comprising: at least one processor; and a computer-readable non-transitory storage medium which stores instructions executable by the at least one processor, wherein the at least one processor is configured to access the computer-readable non-transitory storage medium and, when executing the instructions, to perform operations comprising: obtaining a first process design kit (PDK) comprising a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; performing a first circuit simulation based on a netlist and the first PDK to obtain values of aging parameters of device instances included in the netlist defining the IC; and performing a second circuit simulation based on the values of the aging parameter and the netlist to obtain aging data of the IC, and wherein each of the plurality of first device models comprises at least one measurement command to be executed in the first circuit simulation to calculate an aging parameter of the IC. 2. The system of claim 1 , wherein the obtaining of the first PDK comprises: obtaining a second PDK comprising a plurality of second device models respectively comprising model parameters defining operational characteristics of the plurality of devices; obtaining an aging library comprising a plurality of measurement commands corresponding to the plurality of devices; and generating the first PDK by adding at least one measurement command to each of the plurality of second device models based on the second PDK and the aging library. 3. The system of claim 1 , wherein the obtaining of the values of the aging parameters comprises: providing the netlist and the first PDK to a circuit simulator; obtaining first simulation data from the circuit simulator; and extracting instances of the aging parameters from the first simulation data. 4. The system of claim 3 , wherein the netlist comprises a plurality of sub-circuits hierarchically connected, and wherein each of the instances of the aging parameters comprises a hierarchical address of a device instance, an aging parameter of the device instance, and a value of the aging parameter. 5. The system of claim 1 , wherein the obtaining of the aging data comprises: obtaining an age of the IC; generating a third PDK of updating a value of at least one of model parameters of the device instances based on the values of the aging parameters and the age; providing the netlist and the third PDK to a circuit simulator; and obtaining second simulation data as the aging data from the circuit simulator. 6. The system of claim 5 , wherein the generating of the third PDK comprises: calculating an aged value of a model parameter of a device instance based on the values of the aging parameters and the age; and adding a command for overriding an initial value of the model parameter of the device instance with the aged value. 7. A method of estimating aging of an integrated circuit (IC), the method comprising: obtaining a first process design kit (PDK) comprising a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; performing a first circuit simulation based on a netlist and the first PDK to obtain values of aging parameters of device instances included in the netlist defining the IC; and performing a second circuit simulation based on the values of the aging the netlist to obtain aging data of the IC, wherein each of the plurality of first device models comprises at least one measurement command to be executed in the first circuit simulation to calculate an aging parameter of the IC. 8. The method of claim 7 , wherein the obtaining of the first PDK comprises: obtaining a second PDK comprising a plurality of second device models respectively comprising model parameters defining operational characteristics of the plurality of devices; obtaining an aging library comprising a plurality of measurement commands corresponding to the plurality of devices; and generating the first PDK by adding at least one measurement command to each of the plurality of second device models based on the second PDK and the aging library. 9. The method of claim 8 , wherein the generating of the first PDK comprises: inserting, into a second device model, a path to access the aging library and an index of a part of the aging library, the index corresponding to the second device model. 10. The method of claim 8 , wherein the aging library comprises at least one process dependent variable, and wherein the generating of the first PDK comprises adding, before the added at least one measurement command, a part of configuring a value of the at least one process dependent variable. 11. The method of claim 7 , wherein the at least one measurement command directs measurement of a result of an aging function which comprises, as at least one argument, a voltage and/or a current measured from a first device model and defines an aging parameter. 12. The method of claim 11 , wherein the aging function includes a continuous function supported by a plurality of circuit simulators. 13. The method of claim 7 , wherein the obtaining of the values of the aging parameters comprises: providing the netlist and the first PDK to a circuit simulator; obtaining first simulation data from the circuit simulator; and extracting instances of the aging parameters from the first simulation data. 14. The method of claim 13 , wherein the netlist comprises a plurality of sub-circuits hierarchically connected, and wherein each of the instances of the aging parameters comprises a hierarchical address of a device instance, an aging parameter of the device instance, and a value of the aging parameter. 15. The method of claim 7 , wherein the obtaining of the aging data comprises: obtaining an age of the IC; generating a third PDK of updating a value of at least one of model parameters of the device instances based on the values of the aging parameters and the age; providing the netlist and the third PDK to a circuit simulator; and obtaining second simulation data as the aging data from the circuit simulator. 16. The method of claim 15 , wherein the generating of the third PDK comprises: calculating an aged value of a model parameter of a device instance based on the values of the aging parameters and the age; and adding a command for overriding an initial value of the model parameter of the device instance with the aged value. 17. The method of claim 7 , further comprising: evaluating a reliability of the IC based on the aging data; and fabricating the IC by the process when the reliability is equal to or higher than a reference value. 18. A method of estimating aging of an integrated circuit (IC), the method comprising: obtaining a first process design kit (PDK) comprising a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; and performing a first circuit simulation based on a netlist and the first PDK to obtain values of aging parameters of device instances included in the netlist defining the IC, wherein the obtaining of the first PDK comprises: obtaining a second PDK comprising a plurality of second device models comprising model parameters defining operational characteristics of the plurality of devices, respectively; obtaining an aging library comprising a plurality of measurement commands to calcu

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Classifications

  • using simulation · CPC title

  • Ageing analysis or optimisation against ageing · CPC title

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What does patent US11972185B2 cover?
A method of estimating aging of an integrated circuit (IC) includes: obtaining a first process design kit (PDK) including a plurality of first device models corresponding to a plurality of devices provided by a process of fabricating the IC; obtaining values of aging parameters of device instances included in a netlist defining the IC, by performing a first circuit simulation based on the netli…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F30/3308. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 30 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).