Microelectromechanical system (MEMS) structure and method of formation

Patent metadata

Field	Value
Publication number	US-11953674-B2
Application number	US-202117153521-A
Country	US
Kind code	B2
Filing date	Jan 20, 2021
Priority date	Dec 29, 2017
Publication date	Apr 9, 2024
Grant date	Apr 9, 2024

Abstract

A microelectromechanical system (MEMS) structure includes at least first and second metal vias. Each of the first and second metal vias includes a respective planar metal layer having a first thickness and a respective post formed from the planar metal layer. The post has a sidewall, and the sidewall has a second thickness greater than 14% of the first thickness.

First claim

What is claimed is:

1. A microelectromechanical system (MEMS) structure, comprising:
a substrate;
a first metal layer on the substrate, the first metal layer forming sidewalls and a bottom of a via, the first metal layer confined to the via; and
a second metal layer on the first metal layer.

2. The MEMS structure of claim 1 , wherein the via is a first via, the sidewalls are first sidewalls, and the bottom is a first bottom, the MEMS structure further comprising:
a third metal layer forming second sidewalls and a second bottom of a second via, wherein the third metal layer is on the second metal layer.

3. The MEMS structure of claim 1 , the second metal layer having a first thickness, and the first and second metal layers having a second thickness on the via sidewalls, wherein the second thickness greater than 14% of the first thickness.

4. The MEMS structure of claim 3 , wherein the second thickness is greater than 20% of the first thickness.

5. The MEMS structure of claim 4 , wherein the second thickness is greater than 28% of the first thickness.

6. The MEMS structure of claim 1 , further comprising a spacer layer on the substrate, the first metal layer and the second metal layer on the spacer layer.

7. The MEMS structure of claim 1 , wherein the second metal layer is formed by a physical vapor deposition (PVD) process.

8. The MEMS structure of claim 6 , wherein the spacer layer comprises a photoresist, spin on glass (SOG), silicon dioxide, or silicon nitride.

9. A microelectromechanical system (MEMS) structure, comprising:
a substrate;
a first metal layer on the substrate, the first metal layer forming first sidewalls and a first bottom of a first via;
a second metal layer on the first metal layer;
a third metal layer on the second metal layer, the second metal layer forming second sidewalls and a second bottom of the second via, the second metal layer confined to the second via; and
a fourth metal layer on the third metal layer.

10. The MEMS structure of claim 9 , wherein the first via is a bias via and the second via is a mirror via.

11. The MEMS structure of claim 10 , wherein the fourth metal layer comprises a micromirror.

12. The MEMS structure of claim 11 , wherein the second metal layer comprises a hinge and a spring tip.

13. The MEMS structure of claim 12 , wherein the mirror via electrically couples the hinge to the micromirror.

14. The MEMS structure of claim 9 , wherein the first via is an address via and the second via is a mirror via.

15. The MEMS structure of claim 14 , wherein the second metal layer comprises an electrode.

16. The MEMS structure of claim 15 , further comprising an address pad on the substrate, the address pad configured to receive a voltage.

17. The MEMS structure of claim 9 , wherein the first metal layer is confined to the first via.

18. The MEMS structure of claim 9 , the second metal layer having a first thickness, and the first and second metal layers having a second thickness on the via sidewalls, wherein the second thickness greater than 14% of the first thickness.

19. A semiconductor structure, comprising:
a lower layer;
a polymer layer on the lower layer;
a via in the polymer layer, the via having via sidewalls and a via bottom;
a first metal layer on the via sidewalls and the via bottom, the first metal layer confined to the via; and
a second metal layer on the polymer layer and on the first metal layer.

20. The semiconductor structure of claim 19 , wherein the second metal layer is deposited on the polymer layer.

Assignees

• Texas Instruments Inc

Inventors

• Martinez Jose A

Classifications

• G02B26/0841 Primary

  the reflecting element being moved or deformed by electrostatic means · CPC title

• B81B7/02

  containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

• B81C1/00047

  Cavities · CPC title

• B81B2201/042

  Micromirrors, not used as optical switches · CPC title

• B81C2201/0132

  Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling · CPC title