Compact power converter with transistors thermally and electrically connected to a fluid cooled bus bar
US-2024348164-A1 · Oct 17, 2024 · US
US11950388B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11950388-B2 |
| Application number | US-202017640761-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 7, 2020 |
| Priority date | Sep 6, 2019 |
| Publication date | Apr 2, 2024 |
| Grant date | Apr 2, 2024 |
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Circuit board, defining a plurality of switching arms connected in parallel so as to convert a first voltage into a second voltage, at least one of which is DC voltage. The board includes a plurality of controllable electronic switches mounted pairwise in series on either side of a midpoint, so as to produce the switching arms connected in parallel. A plurality of decoupling capacitors are connected in parallel to one another, and in parallel to the DC voltage. Two electrically conductive layers are arranged parallel to one other, one of which is at the highest potential of the DC voltage and the other of which is at the lowest potential of the DC voltage. Each of the decoupling capacitors having one terminal connected to one of these electrically conductive layers and its other terminal connected to the other of these electrically conductive layers.
Opening claim text (preview).
The invention claimed is: 1. A circuit board, defining a plurality of switching arms connected in parallel so as to convert a first voltage to a second voltage, at least one of these voltages being a DC voltage, the board comprising: a plurality of controllable electronic switches mounted pairwise in series on either side of a midpoint, so as to produce the switching arms connected in parallel, a plurality of decoupling capacitors, these capacitors being connected in parallel to one another, and in parallel to the DC voltage, and two electrically conductive layers, in particular arranged parallel to one other, one of these electrically conductive layers electrically being at the highest potential of the DC voltage and the other of these electrically conductive layers being at the lowest potential of the DC voltage, each of the decoupling capacitors having one terminal connected to one of these electrically conductive layers and its other terminal connected to the other of these electrically conductive layers, the electronic switches being arranged on the board so that the pattern connecting all the midpoints of the switching arms defines a first polygon which has a number of sides greater than or equal to 3, and each of the two electrically conductive layers extending at least over a face superposed on the first polygon. 2. The circuit board as claimed in claim 1 , each controllable electronic switch of a switching arm occupying either a position far from the center of the first polygon with respect to the midpoint of said arm or a position close to the center of the first polygon with respect to said midpoint. 3. The circuit board as claimed in claim 2 , the decoupling capacitors being arranged on the board so that the pattern connecting all these capacitors defines a second polygon, this second polygon being in particular of the same type as the first polygon. 4. The circuit board as claimed in claim 2 , both the first voltage and the second voltage being a DC voltage, the first DC voltage being in particular greater than the second DC voltage. 5. A voltage converter, in particular a DC/DC voltage converter, and in particular a 12 V/48 V DC voltage converter, comprising a circuit board as claimed in claim 2 . 6. The circuit board as claimed in claim 1 , the decoupling capacitors being arranged on the board so that the pattern connecting all these capacitors defines a second polygon, this second polygon being in particular of the same type as the first polygon. 7. The circuit board as claimed in claim 6 , the second polygon being contained inside, or at least predominantly inside, the first polygon, or the first polygon being contained inside, or at least predominantly inside, the second polygon. 8. The circuit board as claimed in claim 1 , both the first voltage and the second voltage being a DC voltage, the first DC voltage being in particular greater than the second DC voltage. 9. The circuit board as claimed in claim 8 , comprising a plurality of decoupling capacitors connected in parallel to one another, and in parallel to the first DC voltage, and a plurality of decoupling capacitors connected in parallel to one another and in parallel to the second DC voltage, one of the pluralities of capacitors being arranged on the board so that the pattern connecting all these capacitors defines the second polygon and the other of the pluralities of capacitors being arranged on the board so that the pattern connecting all these capacitors defines a third polygon, the third polygon being in particular of the same type as the first and the second polygon. 10. The circuit board as claimed in claim 9 , the third polygon being contained inside, or at least predominantly inside, the first polygon, or the first polygon being contained inside, or at least predominantly inside, the third polygon. 11. The circuit board as claimed in claim 10 , comprising a plurality of inductors, each inductor being associated with a switching arm and electrically connected to the midpoint of said arm, the inductors being arranged on the board so that the pattern connecting all these inductors defines a fourth polygon, the fourth polygon being in particular of the same type as the first polygon. 12. The circuit board as claimed in claim 10 , the first DC voltage being defined between a first positive potential and ground, and the second DC voltage being defined between a second positive potential and ground, the board comprising: a first electrically conductive layer at the first electric potential, a second electrically conductive layer at the second electric potential, and a third electrically conductive layer at ground, at least two of the electrically conductive layers, in particular all the electrically conductive layers, extending at least over a face superposed on the first polygon. 13. The circuit board as claimed in claim 9 , the second polygon being contained inside, or at least predominantly inside, the first polygon, and the first polygon being contained inside, or at least predominantly inside, the third polygon. 14. The circuit board as claimed in claim 9 , comprising a plurality of inductors, each inductor being associated with a switching arm and electrically connected to the midpoint of said arm, the inductors being arranged on the board so that the pattern connecting all these inductors defines a fourth polygon, the fourth polygon being in particular of the same type as the first polygon. 15. The circuit board as claimed in claim 14 , one of the first, second, third and fourth polygons containing all the other polygons, and at least two of the electrically conductive layers, in particular all the electrically conductive layers, extending at least over a face superposed on this polygon inside which all the other polygons are arranged. 16. The circuit board as claimed in claim 15 , each capacitor of the plurality of capacitors defining the second polygon having one terminal electrically connected to the first electrically conductive layer and its other terminal electrically connected to the third electrically conductive layer, and each capacitor of the plurality of capacitors defining the third polygon having one terminal electrically connected to the second electrically conductive layer and its other terminal electrically connected to the third electrically conductive layer. 17. The circuit board as claimed in claim 9 , the first DC voltage being defined between a first positive potential and ground, and the second DC voltage being defined between a second positive potential and ground, the board comprising: a first electrically conductive layer at the first electric potential, second electrically conductive layer at the second electric potential, and a third electrically conductive layer at ground, at least two of the electrically conductive layers, in particular all the electrically conductive layers, extending at least over a face superposed on the first polygon. 18. The circuit board as claimed in claim 17 , each capacitor of the plurality of capacitors defining the second polygon having one terminal electrically connected to the first electrically conductive layer and its other terminal electrically connected to the third electrically conductive layer, and each capacitor of the plurality of capacitors defining the third polygon having one terminal electrically connected to the second electrically conductive layer and its other terminal electrically connected to the third electrically conductive layer. 19. The circuit board as claimed in claim 17
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