Methods and devices related to radio frequency devices

US11948802B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11948802-B2
Application numberUS-202117645640-A
CountryUS
Kind codeB2
Filing dateDec 22, 2021
Priority dateAug 8, 2019
Publication dateApr 2, 2024
Grant dateApr 2, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: a semiconductor substrate having a first side and a second side opposite the first side, wherein a thickness of the semiconductor substrate is 70 μm or less; at least one radio frequency device formed at the first side of the semiconductor substrate; and a processed region at the second side of the semiconductor substrate, wherein the processed region is configured to provide additional ion gettering at the second side of the semiconductor substrate and wherein the processed region comprises one or more of: an ion implanted layer; a defect rich layer; a doped layer with a dopant concentration higher than in a region adjacent to the doped layer; an aluminum oxide layer; and a reactive ion etched region, wherein the at least one radio frequency device comprises at least two radio frequency devices, wherein the device further comprises: at least one of an ion implanted region or an etched region from the second side of the semiconductor substrate limited to an area between the at least two radio frequency devices. 2. The device of claim 1 , further comprising a heat spreading layer on the second side of the semiconductor substrate. 3. The device of claim 1 , wherein the ion implanted region extends into a device layer on the first side of the semiconductor substrate. 4. The device of claim 1 , further comprising a support substrate mounted at the second side. 5. The device of claim 1 , wherein the reactive ion etched region comprises a Bosch etched region. 6. The device of claim 1 , wherein the processed region substantially extends over the whole second side of the semiconductor substrate. 7. The device of claim 6 , wherein the processed region extends over at least 80% of the second side. 8. The device of claim 6 , wherein the processed region extends over at least 90% of the second side. 9. The device of claim 1 , wherein the processed region is configured to reduce a density of free charge carriers at the second side of the semiconductor substrate. 10. A device, comprising: a thinned semiconductor substrate having a first side and a second side opposite the first side; at least one radio frequency device formed at the first side of the thinned semiconductor substrate; and a processed region at the second side of the thinned semiconductor substrate, wherein the processed region comprises one or more of: an ion implanted layer; a defect rich layer; a doped layer with a dopant concentration higher than in a region adjacent to the doped layer; an aluminum oxide layer; and a reactive ion etched region, wherein the reactive ion etched region comprises a Bosch etched region, wherein the at least one radio frequency device comprises at least two radio frequency devices, wherein the device further comprises: at least one of an ion implanted region or an etched region from the second side of the thinned semiconductor substrate limited to an area between the at least two radio frequency devices, wherein the ion implanted region extends into a device layer on the first side of the thinned semiconductor substrate. 11. The device of claim 10 , further comprising a heat spreading layer on the second side of the thinned semiconductor substrate. 12. A device, comprising: a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate includes a processed region to at least one of reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device, wherein the thinned semiconductor substrate comprises: a bottom semiconductor layer on the second side; an insulating layer on the bottom semiconductor layer; and a top semiconductor layer on the insulating layer, wherein a thickness of the bottom semiconductor layer is between 5 μm and 70 μm, and wherein the processed region is adapted to pin a Fermi level at or near the middle of a bandgap of the thinned semiconductor substrate. 13. The device of claim 12 , wherein the Fermi level is pinned within 0.2 eV around the middle of the bandgap. 14. The device of claim 12 , wherein the Fermi level is pinned within 0.1 eV around the middle of the bandgap.

Assignees

Inventors

Classifications

  • H10P90/124Primary

    by processing the backside of the wafers · CPC title

  • of silicon-on-insulator structures · CPC title

  • of electrically inactive species · CPC title

  • into Group IV semiconductors · CPC title

  • comprising oxides, nitrides or carbides, e.g. ceramics or glasses · CPC title

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Frequently asked questions

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What does patent US11948802B2 cover?
A device includes a thinned semiconductor substrate having a first side and a second side opposite to the first side; and at least one radio frequency device at the first side, wherein the second side of the thinned semiconductor substrate is processed to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device through Bosch etching.
Who is the assignee on this patent?
Infineon Tech Dresden Gmbh & Co Kg
What technology area does this patent fall under?
Primary CPC classification H10P90/124. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 02 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).