Symmetric layout for high-voltage amplifier

US11942468B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11942468-B2
Application numberUS-202117303251-A
CountryUS
Kind codeB2
Filing dateMay 25, 2021
Priority dateMay 25, 2021
Publication dateMar 26, 2024
Grant dateMar 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis and in which the first terminal and the second terminal are located at an edge of the package terminal array. A low-voltage circuit may be coupled to a third terminal and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns aligned along an axis and having a width defined by a fraction of the terminal spacing pitch.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a package terminal array comprising a plurality of terminals, wherein a spacing between adjacent terminals is less than 0.5 mm; a first high-voltage circuit configured to output a first signal to a first terminal of the package terminal array that may exceed 15 volts; a second high-voltage circuit configured to output a second signal to a second terminal of the package terminal array that may exceed 15 volts; and a low-voltage circuit coupled to a third terminal of the package terminal array and positioned between the first high-voltage circuit and the second high-voltage circuit, wherein the low-voltage circuit comprises circuitry organized in columns oriented along an axis and the columns having a width defined by a fraction of the spacing of the package terminal array, wherein: the fraction is a ratio of a positive integer number less than or equal to twelve, the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around the axis, and the first terminal and the second terminal are located at an edge of the package terminal array. 2. The apparatus of claim 1 , wherein the first high-voltage circuit comprises first circuitry components and the second high-voltage circuit comprises second circuitry components, wherein the first circuitry components are organized symmetrically with the second circuitry components around the axis. 3. The apparatus of claim 2 , wherein the first high-voltage circuit comprises first amplifier circuitry and the second high-voltage circuit comprises second amplifier circuitry corresponding to the first high-voltage circuit. 4. The apparatus of claim 1 , wherein the low-voltage circuit comprises: analog circuitry; and digital circuitry adjacent to and coupled to the analog circuitry. 5. The apparatus of claim 4 , wherein: at least one terminal of the package terminal array comprises an input terminal configured to receive an input audio signal; the first high-voltage circuit and the second high-voltage circuit are configured as output stages of a differential amplifier to amplify the input audio signal received at the input terminal for output as a high-voltage signal representative of the input audio signal to the first terminal and the second terminal; and the analog circuitry comprises a modulator. 6. The apparatus of claim 5 , further comprising a piezoelectric transducer coupled to the first terminal and to the second terminal for reproducing audio representative of the input audio signal from the high-voltage signal. 7. The apparatus of claim 1 , further comprising: a first plurality of vertical conductors coupled to the first high-voltage circuit; and a first plurality of horizontal conductors coupled to the first plurality of vertical conductors, wherein: the first plurality of horizontal conductors couple the plurality of vertical conductors to terminals of the package terminal array, the first high-voltage circuit is aligned with the first plurality of vertical conductors such that a length of the horizontal conductors is less than a spacing of the package terminal array. 8. The apparatus of claim 1 , wherein: the first high-voltage circuit is configured to output the first signal based on feedback received from a third terminal of the package terminal grid array, the second high-voltage circuit is configured to output the second signal based on feedback received from a fourth terminal of the package terminal grid array, the third terminal and the fourth terminal being located at the edge of the package terminal array. 9. The apparatus of claim 1 , further comprising: a first supply rail extending through each column; and a second supply rail extending through each column. 10. The apparatus of claim 1 , wherein the low-voltage circuit is configured to output a signal not exceeding 10 Volts. 11. The apparatus of claim 1 , wherein the package terminal array comprises a ball grid array (BGA). 12. The apparatus of claim 1 , wherein the first high-voltage circuit and the second high-voltage circuit each comprises circuitry organized in columns aligned along the axis and the columns have a width defined by a fraction of the spacing of the package terminal array. 13. The apparatus of claim 1 , wherein the package terminal array comprises: a first array of terminals configured to receive high-voltage signals; and a second array of terminals configured to receive low-voltage signals, wherein no terminals of the first array are located in an interior of the package terminal array. 14. An apparatus, comprising: an audio amplifier configured to amplify an input audio signal to generate an output audio signal for driving a load, comprising: a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals is less than 0.5 mm; a differential amplifier comprising a first high-voltage circuit configured to amplify a first signal of a differential signal to produce a first high-voltage output signal at a first terminal of the package terminal array, the differential amplifier further comprising a second high-voltage circuit configured to amplify a second signal of the differential signal to produce a second high-voltage output signal at a second terminal of the package terminal array, wherein the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically around an axis through the audio amplifier, and wherein the first terminal and the second terminal are located at an edge of the package terminal array; a control circuit comprising gate drivers configured to control the first high-voltage circuit and the second high-voltage circuit of the differential amplifier, wherein the control circuit is positioned between the first high-voltage circuit and the second high-voltage circuit. 15. The apparatus of claim 14 , further comprising low-voltage analog circuitry comprising a modulator coupled to the first high-voltage circuit and the second high-voltage circuit, wherein the modulator is positioned between the first high-voltage circuit and the second high-voltage circuit. 16. The apparatus of claim 15 , further comprising low-voltage digital circuitry comprising digital signal processing circuitry, wherein the low-voltage digital circuitry is coupled to the low-voltage analog circuitry and positioned between the first high-voltage circuit and the second high-voltage circuit. 17. The apparatus of claim 16 , wherein: the low-voltage digital circuitry and the low-voltage analog circuitry are organized in columns oriented along the axis, and each column of the columns comprises a first supply rail and a second supply rail extending through each column. 18. The apparatus of claim 17 , wherein the package terminal array comprises: a first array of terminals configured to receive high-voltage signals; and a second array of terminals configured to receive low-voltage signals, wherein no terminals of the first array are located in an interior of the package terminal array. 19. A method, comprising: forming a plurality of dies on a wafer by performing steps comprising: forming a first high-voltage circuit configured to amplify a first input signal and output a first output signal; forming a second high-voltage circuit configured to amplify a second input signal and output a second output signal, wherein the first high-voltage circuit and the second high-voltage circuit are positioned symmetrically ar

Assignees

Inventors

Classifications

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • for HF amplifiers · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • at high-frequency [HF] or radio frequency [RF] · CPC title

  • H10D89/10Primary

    Integrated device layouts · CPC title

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What does patent US11942468B2 cover?
A packaged semiconductor die may include a package terminal array comprising a plurality of terminals, wherein a spacing between the plurality of terminals of the ball grid array is less than 0.5 mm. First and second high-voltage circuits of the die may output a differential signal to a first and second terminal that may exceed 15 volts, in which the first high-voltage circuit and the second hi…
Who is the assignee on this patent?
Cirrus Logic Int Semiconductor Ltd, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification H10D89/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).