Voltage control of SOT-MRAM for deterministic writing

US11930720B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11930720-B2
Application numberUS-202117495390-A
CountryUS
Kind codeB2
Filing dateOct 6, 2021
Priority dateApr 28, 2021
Publication dateMar 12, 2024
Grant dateMar 12, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a storage unit, a data writing method and a data reading method thereof, a memory and an electronic device. The storage unit includes a semiconductor substrate, a first insulating medium layer, a ferroelectric thin film layer, a bottom electrode, a tunnel junction, a first metal interconnection portion, a second metal interconnection portion, a third metal interconnection portion and a fourth metal interconnection portion. The first insulating medium layer is formed on the semiconductor substrate, the ferroelectric thin film layer is disposed on the first insulating medium layer, the bottom electrode is formed on the ferroelectric thin film layer, and the tunnel junction is formed on the bottom electrode. The first metal interconnection portion is connected to a first end of the bottom electrode, and the third metal interconnection portion is connected to a second end of the bottom electrode. The second metal interconnection portion is connected to the ferroelectric thin film layer, and the fourth metal interconnection portion is connected to the tunnel junction. As compared with the prior art, the present disclosure can control a directional flipping of the magnetic moment in the tunnel junction based on the ferroelectric thin film layer provided. Based on the structural design of the storage unit, the present disclosure does not require an external magnetic field, and fully meets the requirement of high integration of the device.

First claim

Opening claim text (preview).

The invention claimed is: 1. A magnetic random access storage unit, comprising: a semiconductor substrate; a first insulating medium layer formed on the semiconductor substrate; a ferroelectric thin film layer disposed on the first insulating medium layer; a bottom electrode formed on the ferroelectric thin film layer; a tunnel junction formed on the bottom electrode; a first metal interconnection portion connected to a first end of the bottom electrode; a second metal interconnection portion connected to the ferroelectric thin film layer; a third metal interconnection portion connected to a second end of the bottom electrode, the second end and the first end being respectively located on both sides of the bottom electrode; a fourth metal interconnection portion connected to the tunnel junction; a first interconnection metal layer formed on the first insulating medium layer; the first interconnection metal layer being used for the connection of the first metal interconnection portion to the first end of the bottom electrode; a second interconnection metal layer formed on the first insulating medium layer, the second interconnection metal layer being used for the connection of the third metal interconnection portion to the second end of the bottom electrode; a second insulating medium layer formed on the first interconnection metal layer and the second interconnection metal layer, the tunnel junction being disposed in the second insulating medium layer; and a fourth via disposed on the tunnel junction and formed in the second insulating medium layer, the fourth metal interconnection portion being formed in the fourth via. 2. The magnetic random access storage unit according to claim 1 , further comprising: a first via formed in the first insulating medium layer; the first metal interconnection portion being formed in the first via; a second via formed in the first insulating medium layer; the second metal interconnection portion being formed in the second via; and a third via formed in the first insulating medium layer, the third metal interconnection portion being formed in the third via. 3. A magnetic random access memory, comprising the magnetic random access storage unit according to claim 1 . 4. An electronic device, comprising the magnetic random access memory according to claim 3 . 5. A data writing method for a magnetic random access storage unit, comprising: applying a voltage to a ferroelectric thin film layer and a bottom electrode thereon, so that the ferroelectric thin film layer is in a polarized state; stopping applying the voltage; and applying a current into the bottom electrode to write data into a tunnel junction on the bottom electrode; wherein the data writing method for the magnetic random access storage unit is accomplished through the magnetic random access storage unit according to claim 1 . 6. The data writing method for the magnetic random access storage unit according to claim 5 , wherein the applying the voltage to the ferroelectric thin film layer and the bottom electrode thereon comprises: applying a vertical voltage to the ferroelectric thin film layer and the bottom electrode disposed in sequence in a vertical direction. 7. The data writing method for the magnetic random access storage unit according to claim 5 , wherein the applying the voltage to the ferroelectric thin film layer and the bottom electrode thereon comprises: applying a positive voltage or a negative voltage according to the data to be written. 8. The data writing method for the magnetic random access storage unit according to claim 5 , wherein the applying the current into the bottom electrode comprises: applying a horizontal current between a first end of the bottom electrode and a second end of the bottom electrode. 9. The data writing method for the magnetic random access storage unit according to claim 5 , wherein the applying the current into the bottom electrode comprises: applying a positive current or a negative current according to the data to be written. 10. A data reading method for a magnetic random access storage unit, comprising: applying a voltage to a ferroelectric thin film layer, a bottom electrode, and a tunnel junction that are disposed in sequence in a vertical direction to read data from the tunnel junction; wherein the data reading method for a magnetic random access storage unit is accomplished through the magnetic random access storage unit according to claim 1 . 11. A magnetic random access storage unit, comprising: a semiconductor substrate; a first insulating medium layer formed on the semiconductor substrate; a ferroelectric thin film layer disposed on the first insulating medium layer; a bottom electrode formed on the ferroelectric thin film layer; a tunnel junction formed on the bottom electrode; a first metal interconnection portion connected to a first end of the bottom electrode; a second metal interconnection portion connected to the ferroelectric thin film layer; a third metal interconnection portion connected to a second end of the bottom electrode, the second end and the first end being respectively located on both sides of the bottom electrode; a fourth metal interconnection portion connected to the tunnel junction; a second insulating medium layer formed on the ferroelectric thin film layer; a first via formed in the second insulating medium layer, the first metal interconnection portion being formed in the first via; a second via formed in the first insulating medium layer, the second metal interconnection portion being formed in the second via; a third via formed in the second insulating medium layer, the third metal interconnection portion being formed in the third via; and a fourth via disposed on the tunnel junction and formed in the second insulating medium layer, the fourth metal interconnection portion being formed in the fourth via. 12. A magnetic random access memory, comprising the magnetic random access storage unit according to claim 11 . 13. An electronic device, comprising the magnetic random access memory according to claim 12 . 14. A data writing method for a magnetic random access storage unit, comprising: applying a voltage to a ferroelectric thin film layer and a bottom electrode thereon, so that the ferroelectric thin film layer is in a polarized state; stopping applying the voltage; and applying a current into the bottom electrode to write data into a tunnel junction on the bottom electrode; wherein the data writing method for the magnetic random access storage unit is accomplished through the magnetic random access storage unit according to claim 11 . 15. The data writing method for the magnetic random access storage unit according to claim 14 , wherein the applying the voltage to the ferroelectric thin film layer and the bottom electrode thereon comprises: applying a vertical voltage to the ferroelectric thin film layer and the bottom electrode disposed in sequence in a vertical direction. 16. The data writing method for the magnetic random access storage unit according to claim 14 , wherein the applying the voltage to the ferroelectric thin film layer and the bottom electrode thereon comprises: applying a positive voltage or a negative voltage according to the data to be written. 17. The data writing method for the magnetic random access storage unit according to claim 14 , wherein the applying the current into the bottom electrode comprises: applying a horizontal current between a first end of the bottom electrode and a second end of the bo

Assignees

Inventors

Classifications

  • H10N52/80Primary

    Constructional details · CPC title

  • G11C11/161Primary

    details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • Reading or sensing circuits or methods · CPC title

  • Writing or programming circuits or methods · CPC title

  • using Hall-effect devices · CPC title

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What does patent US11930720B2 cover?
The present disclosure provides a storage unit, a data writing method and a data reading method thereof, a memory and an electronic device. The storage unit includes a semiconductor substrate, a first insulating medium layer, a ferroelectric thin film layer, a bottom electrode, a tunnel junction, a first metal interconnection portion, a second metal interconnection portion, a third metal interc…
Who is the assignee on this patent?
Inst Of Microelectronics Cas
What technology area does this patent fall under?
Primary CPC classification H10N52/80. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 12 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).