Semiconductor device and method of fabricating the same
US-2022115511-A1 · Apr 14, 2022 · US
US11929411B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11929411-B2 |
| Application number | US-202117411643-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 25, 2021 |
| Priority date | Aug 25, 2021 |
| Publication date | Mar 12, 2024 |
| Grant date | Mar 12, 2024 |
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A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region is in the semiconductor material below the pair of source/drain regions and extends along the trench sidewalls and around the trench bottom. Other embodiments, including structure independent of method, are disclosed.
Opening claim text (preview).
The invention claimed is: 1. A recessed access device comprising: a conductive gate in a trench in semiconductor material; a gate insulator extending along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material; a pair of source/drain regions in upper portions of the semiconductor material on opposing lateral sides of the trench; a channel region in the semiconductor material below the pair of source/drain regions extending along sidewalls and around a bottom of the trench; the gate insulator comprising a low-k material and a high-k material, the low-k material being characterized by its dielectric constant k being no greater than 4.0, the high-k material being characterized by its dielectric constant k being greater than 4.0, the low-k material extending completely along all of the sidewalls of and directly under the bottom of the conductive gate, the high-k material being laterally-inward of the low-k material and at least one of (a) and (b), where: (a): extending less-than-completely along all of the sidewalls of the conductive gate; and (b): not being directly under the bottom of the conductive gate; comprising the (a); the high-k material covers 10% to 95% of the sidewalls of the conductive gate; and the high-k material covers less than 50% of the sidewalls of the conductive gate. 2. The recessed access device of claim 1 wherein the high-k material covers 10% to 25% of the sidewalls of the conductive gate. 3. A recessed access device comprising: a conductive gate in a trench in semiconductor material; a gate insulator extending along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material; a pair of source/drain regions in upper portions of the semiconductor material on opposing lateral sides of the trench; a channel region in the semiconductor material below the pair of source/drain regions extending along sidewalls and around a bottom of the trench; the gate insulator comprising a low-k material and a high-k material, the low-k material being characterized by its dielectric constant k being no greater than 4.0, the high-k material being characterized by its dielectric constant k being greater than 4.0, the low-k material extending completely along all of the sidewalls of and directly under the bottom of the conductive gate, the high-k material being laterally-inward of the low-k material and at least one of (a) and (b), where: (a): extending less-than-completely along all of the sidewalls of the conductive gate; and (b): not being directly under the bottom of the conductive gate; comprising the (a); and comprising the (b). 4. The recessed access device of claim 3 wherein the high-k material extends completely along all of the sidewalls of the conductive gate. 5. A recessed access device comprising: a conductive gate in a trench in semiconductor material; a gate insulator extending along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material; a pair of source/drain regions in upper portions of the semiconductor material on opposing lateral sides of the trench; a channel region in the semiconductor material below the pair of source/drain regions extending along sidewalls and around a bottom of the trench; the gate insulator comprising a low-k material and a high-k material, the low-k material being characterized by its dielectric constant k being no greater than 4.0, the high-k material being characterized by its dielectric constant k being greater than 4.0, the low-k material extending completely along all of the sidewalls of and directly under the bottom of the conductive gate, the high-k material being laterally-inward of the low-k material and at least one of (a) and (b), where: (a): extending less-than-completely along all of the sidewalls of the conductive gate; and (b): not being directly under the bottom of the conductive gate; comprising the (a); and comprising the (a) and the (b). 6. A recessed access device comprising: a conductive gate in a trench in semiconductor material; a gate insulator extending along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material; a pair of source/drain regions in upper portions of the semiconductor material on opposing lateral sides of the trench; a channel region in the semiconductor material below the pair of source/drain regions extending along sidewalls and around a bottom of the trench; the gate insulator comprising a low-k material and a high-k material, the low-k material being characterized by its dielectric constant k being no greater than 4.0, the high-k material being characterized by its dielectric constant k being greater than 4.0, the low-k material extending completely along all of the sidewalls of and directly under the bottom of the conductive gate, the high-k material being laterally-inward of the low-k material and at least one of (a) and (b), where: (a): extending less-than-completely along all of the sidewalls of the conductive gate; and (b): not being directly under the bottom of the conductive gate; comprising the (a); and the high-k material is aside a top of the conductive gate at an elevation of the top of the conductive gate. 7. The recessed access device of claim 6 wherein the high-k material has a top that is at the elevation of the top of the conductive gate. 8. The recessed access device of claim 7 wherein the top of the conductive gate and the top of the high-k material are planar and collectively co-planar. 9. The recessed access device of claim 6 wherein the high-k material has a top that is above the elevation of the top of the conductive gate. 10. The recessed access device of claim 9 wherein the low-k material has a top that is above the elevation of the top of the conductive gate. 11. A recessed access device comprising: a conductive gate in a trench in semiconductor material; a gate insulator extending along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material; a pair of source/drain regions in upper portions of the semiconductor material on opposing lateral sides of the trench; a channel region in the semiconductor material below the pair of source/drain regions extending along sidewalls and around a bottom of the trench; the gate insulator comprising a low-k material and a high-k material, the low-k material being characterized by its dielectric constant k being no greater than 4.0, the high-k material being characterized by its dielectric constant k being greater than 4.0, the low-k material extending completely along all of the sidewalls of and directly under the bottom of the conductive gate, the high-k material being laterally-inward of the low-k material and at least one of (a) and (b), where: (a): extending less-than-completely along all of the sidewalls of the conductive gate; and (b): not being directly under the bottom of the conductive gate; comprising the (a); and the high-k material is thinner than the low-k material. 12. The recessed access device of claim 11 wherein the high-k material has maximum lateral thickness that is 1% to 60% of that of the low-k material. 13. The recessed access device of claim 12 wherein the high-k material has maximum lateral thickness that is no more than 50% of that of the low-k material. 14. The recessed access device of claim 13 wherein the high-k material has maximum lateral thickness that is no more than 10% of that of the low-k material.
being parallel to the channel plane · CPC title
the thicknesses being non-uniform · CPC title
Manufacture or treatment · CPC title
being perpendicular to the channel plane · CPC title
within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title
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