Display panel and display device for both 2D and 3D display, and method for manufacturing the same

US11917867B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11917867-B2
Application numberUS-202016939239-A
CountryUS
Kind codeB2
Filing dateJul 27, 2020
Priority dateDec 20, 2019
Publication dateFeb 27, 2024
Grant dateFeb 27, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided are a display panel and a method for manufacturing the same, a display device and a control method of the same related to the technical field of display. The display panel includes a base substrate; a pixel defining layer arranged on the base substrate and configured to define a plurality of sub-pixels, at least one sub-pixel of the plurality of sub-pixels includes a plurality of sub-pixel-units; and each sub-pixel-unit of the plurality of sub-pixels includes an anode, a light emitting layer, and a cathode that are stacked, and anodes of adjacent sub-pixel-units in a same sub-pixel are insulated from each other and are apart from the base substrate for different distances.

First claim

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What is claimed is: 1. A display panel, comprising: a base substrate; a pixel defining layer arranged on the base substrate and configured to define a plurality of sub-pixels, wherein: at least one sub-pixel of the plurality of sub-pixels includes a plurality of sub-pixel-units; and each of the sub-pixel-units of the plurality of sub-pixels comprises an anode, a light emitting layer, and a cathode that are stacked, and anodes of adjacent sub-pixel-units in a same sub-pixel are insulated from each other, and are apart from the base substrate for different distances, wherein the plurality of sub-pixel-units comprise a first sub-pixel-unit and a second sub-pixel-unit that are adjacent to each other, the first sub-pixel-unit comprises a first anode, and the second sub-pixel-unit comprises a second anode, and sidewalls of the first anode and sidewalls of the second anode are separated by an insulating layer, and wherein a spacing between orthographic projection of the first anode on the base substrate and orthographic projection of the second anode on the base substrate is less than zero, and wherein the display panel further comprises first and second thin film transistors disposed at a same layer between the base substrate and the first and second anodes, and a first via for connecting the first anode to the first thin film transistor and a second via for connecting the second anode to the second thin film transistor are configured to penetrate through different number of layers. 2. The display panel according to claim 1 , further comprising a flat layer covering the first and second thin film transistors, wherein both the first via and the second via are configured to penetrate through the flat layer. 3. The display panel according to claim 2 , wherein the insulating layer is at least partially located between the flat layer and the second anode, and the second via is configured to penetrate through the insulating layer while the first via does not perpetrate through the insulating layer. 4. The display panel according to claim 1 , wherein light emitting layers of different sub-pixel-units in the same sub-pixel are continuously disposed. 5. The display panel according to claim 1 , wherein cathodes of different sub-pixel-units in the same sub-pixel are continuously disposed. 6. The display panel according to claim 1 , wherein light emitting layers of the plurality of sub-pixels are configured to emit white light, and a color filter layer is disposed on a light emitting side of the display panel. 7. The display panel according to claim 1 , wherein light emitting layers of the plurality of sub-pixels are configured to emit red light, green light, and blue light, respectively. 8. The display panel according to claim 1 , wherein in a thickness direction of the display panel, a lower surface of the insulating layer is in contact with an upper surface of the first anode, and a lower surface of the second anode is in contact with an upper surface of the insulating layer. 9. The display panel according to claim 1 , wherein in a thickness direction of the display panel, wherein an upper surface of the first anode is smaller in area than a lower surface of the first anode, and an upper surface of the second anode is greater in area than a lower surface of the second anode. 10. A display device, comprising: a display panel and a lens array disposed on a light emitting side of the display panel, wherein the display panel comprises: a base substrate; and a pixel defining layer arranged on the base substrate and configured to define a plurality of sub-pixels, wherein: at least one sub-pixel of the plurality of sub-pixels includes a plurality of sub-pixel-units; each of the sub-pixel-units of the plurality of sub-pixels comprises an anode, a light emitting layer, and a cathode that are stacked, and anodes of adjacent sub-pixel-units in a same sub-pixel are insulated from each other, and are apart from the base substrate for different distances; and the lens array comprises a plurality of lens units, and each of the lens units corresponds to the plurality of sub-pixels, wherein the plurality of sub-pixel-units comprise a first sub-pixel-unit and a second sub-pixel-unit that are adjacent to each other, the first sub-pixel-unit comprises a first anode, and the second sub-pixel-unit comprises a second anode, and sidewalls of the first anode and sidewalls of the second anode are separated by an insulating layer, and wherein a spacing between orthographic projection of the first anode on the base substrate and orthographic projection of the second anode on the base substrate is less than zero, and wherein the display panel further comprises first and second thin film transistors disposed at a same layer between the base substrate and the first and second anodes, and a first via for connecting the first anode to the first thin film transistor and a second via for connecting the second anode to the second thin film transistor are configured to penetrate through different number of layers. 11. The display device according to claim 10 , wherein each of the lens units corresponds to one of the plurality of sub-pixels. 12. The display device according to claim 11 , wherein each of the plurality of lens units is ball lenses. 13. The display device according to claim 12 , wherein distances H between the light emitting layers of the plurality of sub-pixel-units and the corresponding lens units are: H=n′×f where n′ is an equivalent refractive index of a medium between the light emitting layer and the corresponding lens unit; f is a focal length of the lens unit, and f satisfies: 1 f = ( n - 1 ) ⁡ [ 1 R ⁢ ⁢ 1 - 1 R ⁢ ⁢ 2 + ( n - 1 ) ⁢ d n · R ⁢ ⁢ 1 · R ⁢

Assignees

Inventors

Classifications

  • comprising refractive means, e.g. lenses · CPC title

  • characterised by their shape · CPC title

  • H10K59/124Primary

    Insulating layers formed between TFT elements and OLED elements · CPC title

  • comprising refractive means, e.g. lenses · CPC title

  • Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

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What does patent US11917867B2 cover?
Provided are a display panel and a method for manufacturing the same, a display device and a control method of the same related to the technical field of display. The display panel includes a base substrate; a pixel defining layer arranged on the base substrate and configured to define a plurality of sub-pixels, at least one sub-pixel of the plurality of sub-pixels includes a plurality of sub-p…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/124. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).