Electronic device

US11916059B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11916059-B2
Application numberUS-202117411060-A
CountryUS
Kind codeB2
Filing dateAug 25, 2021
Priority dateOct 4, 2016
Publication dateFeb 27, 2024
Grant dateFeb 27, 2024

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An ESD protection device may include: a first vertically integrated ESD protection structure comprising a first semiconductor portion, a first contact region disposed on a first side of the first semiconductor portion and a first terminal exposed on a second side of the first semiconductor portion opposite the first side of the first semiconductor portion, a second vertically integrated ESD protection structure comprising a second semiconductor portion, a second contact region disposed on a first side of the second semiconductor portion and a second terminal exposed on a second side of the second semiconductor portion opposite the first side of the second semiconductor portion, an electrical connection layer, wherein the first vertically integrated ESD protection structure and the second vertically integrated ESD protection structure are disposed on the electrical connection layer laterally separated from each other and are electrically connected with each other anti-serially via the electrical connection layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electrostatic discharge protection device comprising: a first vertically integrated electrostatic discharge protection structure comprising a first semiconductor portion, a first contact region disposed on a first side of the first semiconductor portion and a first terminal exposed on a second side of the first semiconductor portion opposite the first side of the first semiconductor portion; a second vertically integrated electrostatic discharge protection structure comprising a second semiconductor portion, a second contact region disposed on a first side of the second semiconductor portion and a second terminal exposed on a second side of the second semiconductor portion opposite the first side of the second semiconductor portion; an electrical connection layer, wherein the first vertically integrated electrostatic discharge protection structure and the second vertically integrated electrostatic discharge protection structure are disposed on the electrical connection layer laterally separated from each other and are electrically connected with each other via the electrical connection layer; wherein the electrical connection layer is mounted on a support carrier. 2. The electrostatic discharge protection device of claim 1 , wherein the electrical connection layer is partially exposed in a region between the first vertically integrated electrostatic discharge protection structure and the second vertically integrated electrostatic discharge protection structure. 3. The electrostatic discharge protection device of claim 1 , wherein the first semiconductor portion has a thickness of less than 15 μm and wherein the second semiconductor portion has a thickness of less than 15 μm. 4. The electrostatic discharge protection device of claim 1 , further comprising: a passivation structure laterally surrounding the first semiconductor portion and the second semiconductor portion respectively. 5. The electrostatic discharge protection device of claim 1 , wherein the first terminal has substantially the same lateral extension as the first semiconductor portion and wherein the second terminal has substantially the same lateral extension as the second semiconductor portion. 6. The electrostatic discharge protection device of claim 2 , wherein the first electrostatic discharge protection structure comprises at least two electrostatic discharge protection structure elements in an anti-parallel arrangement and wherein the second electrostatic discharge protection structure comprises at least two electrostatic discharge protection structure elements in an anti-parallel arrangement. 7. The electrostatic discharge protection device of claim 1 , wherein the first electrostatic discharge protection structure comprises at least one first diode structure and a first thyristor structure in an anti-parallel arrangement, wherein the second electrostatic discharge protection structure comprises at least one second diode structure and a second thyristor structure in an anti-parallel arrangement; wherein the at least one first diode structure and the at least one second diode structure are coupled via the electrical connection layer in an anti-serial arrangement, and wherein the at least one first thyristor structure and the at least one second thyristor structure are coupled via the electrical connection layer in an anti-serial arrangement. 8. The electrostatic discharge protection device of claim 1 , wherein a region between the first vertically integrated electrostatic discharge protection structure and the second vertically integrated electrostatic discharge protection structure is free of semiconductor material. 9. The electrostatic discharge protection device of claim 1 , wherein a region between the first vertically integrated electrostatic discharge protection structure and the second vertically integrated electrostatic discharge protection structure is free of solid material. 10. The electrostatic discharge protection device of claim 1 , wherein the first semiconductor portion is configured as at least one of the following: a vertically integrated diode, a vertically integrated transistor, and a vertically integrated thyristor. 11. The electrostatic discharge protection device of claim 1 , wherein the second semiconductor portion is configured as at least one of the following: a vertically integrated diode, a vertically integrated transistor, and a vertically integrated thyristor. 12. The electrostatic discharge protection device of claim 1 , wherein the support carrier is electrically isolated from the first electrostatic discharge protection structure and from the second electrostatic discharge protection structure. 13. The electrostatic discharge protection device of claim 1 , wherein the first electrostatic discharge protection structure comprises at least one first thyristor structure and wherein the second electrostatic discharge protection structure comprises at least one second thyristor structure coupled via the electrical connection layer in an anti-serial arrangement. 14. The electrostatic discharge protection device of claim 13 , wherein the first electrostatic discharge protection structure further comprises at least one first diode structure coupled with the first thyristor structure in an anti-parallel arrangement and wherein the second electrostatic discharge protection structure further comprises at least one second diode structure coupled with the second thyristor structure in an anti-parallel arrangement, the at least one first diode structure and the at least one second diode structure coupled via the electrical connection layer in an anti-serial arrangement. 15. The electrostatic discharge protection device of claim 1 , wherein the first electrostatic discharge protection structure comprises at least one first electrical short and a first thyristor structure in a parallel arrangement and wherein the second electrostatic discharge protection structure comprises at least one second electrical short and a second thyristor structure in a parallel arrangement, the at least one first electrical short and the second thyristor structure coupled in series via the electrical connection layer and the at least one second electrical short and the first thyristor structure coupled in series via the electrical connection layer. 16. An electrostatic discharge protection device comprising: a first vertically integrated electrostatic discharge protection structure comprising a first semiconductor portion, a first contact region disposed on a first side of the first semiconductor portion and a first terminal exposed on a second side of the first semiconductor portion opposite the first side of the first semiconductor portion; a second vertically integrated electrostatic discharge protection structure comprising a second semiconductor portion, a second contact region disposed on a first side of the second semiconductor portion and a second terminal exposed on a second side of the second semiconductor portion opposite the first side of the second semiconductor portion; an electrical connection layer, wherein the first vertically integrated electrostatic discharge protection structure and the second vertically integrated electrostatic discharge protection structure are disposed on the electrical connection layer laterally separated from each other; wherein the first electrostatic discharge protection structure comprises at least one first electrical short and a first electrostatic discharge protection device in a parallel arrangement and wherein the second electrostatic discharge protection struc

Assignees

Inventors

Classifications

  • Dispositions of multiple bond pads · CPC title

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

  • Bond pads having multiple stacked layers · CPC title

  • by plating, e.g. electroless plating or electroplating · CPC title

  • batch processes · CPC title

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Frequently asked questions

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What does patent US11916059B2 cover?
An ESD protection device may include: a first vertically integrated ESD protection structure comprising a first semiconductor portion, a first contact region disposed on a first side of the first semiconductor portion and a first terminal exposed on a second side of the first semiconductor portion opposite the first side of the first semiconductor portion, a second vertically integrated ESD pro…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).