Tiled display apparatus, tiled display control method, and non-transitory computer-readable storage medium

US11914917B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11914917-B2
Application numberUS-202117770036-A
CountryUS
Kind codeB2
Filing dateApr 8, 2021
Priority dateMay 15, 2020
Publication dateFeb 27, 2024
Grant dateFeb 27, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A tiled display apparatus includes a main display driving board and display modules. Each display module includes a system board. The main display driving board is coupled to a first stage system board. The main display driving board is configured to receive a display signal, acquire a main screen region display signal, and transmit the main screen region display signal to the first stage system board. The system board is configured to receive the main screen region display signal, and extract a group of main screen region display data corresponding thereto from the main screen region display signal to control a display module to which the system board belongs to display an image according to the main screen region display data. Except for a last stage system board, remaining system boards are each further configured to transmit the received main screen region display signal to a next stage system board.

First claim

Opening claim text (preview).

What is claimed is: 1. A tiled display apparatus, comprising: a plurality of display modules that are tiled together, each display module including a system board, and system boards of the display modules being cascaded in sequence; a plurality of seam display units, each seam display unit being disposed between two adjacent display modules of the plurality of display modules, the plurality of seam display units including at least one first seam display unit; and a main display driving board being coupled to a first stage system board among the system boards cascaded in sequence and the at least one first seam display unit, wherein the main display driving board is configured to receive a display signal, acquire a main screen region display signal according to the display signal, and transmit the main screen region display signal to the first stage system board; the main screen region display signal includes a plurality of groups of main screen region display data, and a group of main screen region display data is display data required for a display module to display an image; the system board is configured to receive the main screen region display signal, and extract a group of main screen region display data corresponding to the system board from the main screen region display signal to control a display module to which the system board belongs to display an image according to the extracted group of main screen region display data; except for a last stage system board, remaining system boards are each further configured to transmit the received main screen region display signal to a next stage system board; the main display driving board is further configured to acquire at least one first seam region display signal according to the display signal, and transmit the at least one first seam region display signal to the at least one first seam display unit, respectively; each first seam region display signal includes a group of first seam region display data, and a group of first seam region display data is display data required for a first seam display unit to display an image; and each first seam display unit is configured to receive a first seam region display signal to display an image according to a group of first seam region display data included in the first seam region display signal. 2. The tiled display apparatus according to claim 1 , wherein the main display driving board is further configured to divide the display signal according to a number of the plurality of system boards, so as to obtain the main screen region display signal including the plurality of groups of main screen region display data. 3. The tiled display apparatus according to claim 1 , wherein the plurality of seam display units further include at least one second seam display unit; the tiled display apparatus further comprises at least one secondary display driving board, wherein the at least one secondary display driving board is coupled to the main display driving board, and each secondary display driving board is coupled to one or more second seam display units; the main display driving board is further configured to acquire at least one second seam region display signal according to the display signal, and transmit the at least one second seam region display signal to the at least one secondary display driving board, respectively; each second seam region display signal includes at least one group of second seam region display data, and a group of second seam region display data is display data required for a second seam display unit to display an image; each secondary display driving board is configured to receive a second seam region display signal and transmit at least one group of second seam region display data included in the second seam region display signal to one or more second seam display units coupled thereto, respectively; and each second seam display unit is configured to receive a group of second seam region display data to display an image according to the group of second seam region display data. 4. The tiled display apparatus according to claim 3 , wherein the first seam display unit is closer to the main display driving board than the second seam display unit. 5. The tiled display apparatus according to claim 3 , wherein a number of first seam display units is less than or equal to seven; and a number of second seam display units coupled to the secondary display driving board is less than or equal to seven. 6. The tiled display apparatus according to claim 1 , wherein the seam display units are mini light-emitting diode (LED) display units. 7. The tiled display apparatus according to claim 1 , wherein the main display driving board is disposed on a display module to which the first stage system board belongs. 8. The tiled display apparatus according to claim 7 , wherein the tiled display apparatus further comprises at least one secondary display driving board, each secondary display driving board is disposed on any one of display modules adjacent to at least one second seam display unit, which is coupled to the secondary display driving board. 9. The tiled display apparatus according to claim 1 , wherein the main display driving board includes: a display signal input interface, the display signal input interface being configured to receive the display signal; and a first output interface coupled to the first stage system board, the first output interface being configured to transmit the main screen region display signal acquired according to the display signal to the first stage system board. 10. The tiled display apparatus according to claim 9 , further comprising at least one second seam display unit and at least one secondary display driving board, the main display driving board further including: at least one second output interface, wherein the at least one second output interface is respectively coupled to the at least one first seam display unit, and a second output interface is configured to transmit a first seam region display signal acquired according to the display signal to a first seam display unit coupled thereto; and at least one third output interface, wherein the at least one third output interface is respectively coupled to the at least one secondary display driving board, and a third output interface is configured to transmit a second seam region display signal acquired according to the display signal to a secondary display driving board coupled thereto. 11. The tiled display apparatus according to claim 1 , wherein each display module further includes a timing controller, the timing controller is coupled to the system board; the system board is configured to output a timing control signal and a red-green-blue (RGB) data signal according to the extracted main screen region display data; and the timing controller is configured to receive the timing control signal and the RGB data signal, and control the display module to display an image according to the timing control signal and the RGB data signal. 12. The tiled display apparatus according to claim 1 , further comprising a first power circuit, wherein the first power circuit is coupled to the main display driving board, and the first power circuit is configured to provide power to the main display driving board. 13. The tiled display apparatus according to claim 12 , wherein each display module further includes a second power circuit, the second power circuit is coupled to the system board, and the second power circuit is configured to provide power to the system board coupled thereto. 14. The tiled display apparatus according to claim 12 , wherein the ti

Assignees

Inventors

Classifications

  • G06F3/1438Primary

    using more than one graphics controller · CPC title

  • G06F3/1446Primary

    display composed of modules, e.g. video walls · CPC title

  • semiconductive, e.g. using light-emitting diodes [LED] · CPC title

  • Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions · CPC title

  • G06F3/1431Primary

    using a single graphics controller · CPC title

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What does patent US11914917B2 cover?
A tiled display apparatus includes a main display driving board and display modules. Each display module includes a system board. The main display driving board is coupled to a first stage system board. The main display driving board is configured to receive a display signal, acquire a main screen region display signal, and transmit the main screen region display signal to the first stage syste…
Who is the assignee on this patent?
Beijing Boe Display Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/1438. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).