Package with encapsulated electronic component between laminate and thermally conductive carrier

US11908760B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11908760-B2
Application numberUS-202217575015-A
CountryUS
Kind codeB2
Filing dateJan 13, 2022
Priority dateJan 15, 2021
Publication dateFeb 20, 2024
Grant dateFeb 20, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A package is disclosed. In one example, the package comprises a carrier comprising a thermally conductive and electrically insulating layer, a laminate comprising a plurality of connected laminate layers, an electronic component mounted between the carrier and the laminate. An encapsulant is at least partially arranged between the carrier and the laminate and encapsulating at least part of the electronic component.

First claim

Opening claim text (preview).

What is claimed is: 1. A package, wherein the package comprises: a carrier comprising a thermally conductive and electrically insulating layer, a planar first electrically conductive layer on a first main face of the thermally conductive and electrically insulating layer, and a planar second electrically conductive layer on a second main face of the thermally conductive and electrically insulating layer opposing the first main face; a laminate comprising a plurality of connected laminate layers; an electronic component mounted between the carrier and the laminate; and an encapsulant being at least partially arranged between the carrier and the laminate and encapsulating at least part of the electronic component. 2. The package according to claim 1 , wherein the thermally conductive and electrically insulating layer comprises or consists of a ceramic and/or has a thermal conductivity of at least 10 W/mK. 3. The package according to claim 1 , wherein the carrier is configured to thermally couple and electrically insulate the electronic component with respect to an exterior of the package. 4. The package according to claim 1 , wherein the first electrically conductive layer of the carrier faces the encapsulant. 5. The package according to claim 1 , wherein the laminate layers are configured to form a redistribution structure. 6. The package according to claim 1 , wherein the laminate layers are configured to form antiparallel electric connection paths. 7. The package according to claim 1 , wherein an electrically conductive layer of the laminate faces the encapsulant. 8. The package according to claim 1 , wherein the laminate is a printed circuit board. 9. The package according to claim 1 , comprising an electrically conductive through connection extending through the encapsulant and electrically coupling at least one of the electronic component and the carrier with the laminate. 10. The package according to claim 1 , wherein the electronic component is a semiconductor power chip. 11. The package according to claim 1 , wherein the electronic component experiences a vertical current flow during operation. 12. The package according to claim 1 , comprising an electrically conductive connection medium between the electronic component and the carrier. 13. The package according to claim 1 , comprising an electrically conductive connection medium between the electronic component and the laminate. 14. The package according to claim 12 , wherein the electrically conductive connection medium comprises at least one of the group consisting of a solder, in particular a transient liquid phase solder, a sinter material, and an electrically conductive adhesive. 15. The package according to claim 1 , wherein the encapsulant encapsulates at least part of the carrier and/or at least part of the laminate. 16. The package according to claim 1 , comprising at least one of the following features: the package comprises at least one further electronic component embedded in and/or surface mounted on the laminate; the package comprises a bolt member mounted on the laminate and being configured for establishing an electrically conductive connection with a counterpart device, in particular by screwing. 17. An electronic device, comprising: a package according to claim 1 ; and a mounting base on which the package is mounted. 18. The electronic device according to claim 17 , comprising at least one of the following features: wherein the mounting base is physically connected with the laminate, in particular by an electrically conductive connection medium; wherein the electronic device comprises a cooling body, in particular a heat sink, physically connected with the carrier, in particular by an electrically conductive connection medium. 19. A method of manufacturing a package, wherein the method comprises: providing a carrier comprising a thermally conductive and electrically insulating layer, a planar first electrically conductive layer on a first main face of the thermally conductive and electrically insulating layer, and a planar second electrically conductive layer on a second main face of the thermally conductive and electrically insulating layer opposing the first main face; providing a laminate comprising a plurality of connected laminate layers; mounting an electronic component between the carrier and the laminate; and encapsulating at least part of the electronic component by an encapsulant which is at least partially arranged between the carrier and the laminate. 20. The package according to claim 1 , wherein a sidewall of the thermally conductive and electrically insulating layer is aligned with a sidewall of the first electrically conductive layer and a sidewall of the second electrically conductive layer.

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What does patent US11908760B2 cover?
A package is disclosed. In one example, the package comprises a carrier comprising a thermally conductive and electrically insulating layer, a laminate comprising a plurality of connected laminate layers, an electronic component mounted between the carrier and the laminate. An encapsulant is at least partially arranged between the carrier and the laminate and encapsulating at least part of the …
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 20 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).