Semiconductor manufacturing apparatus, substrate transfer method, and program

Patent metadata

Field	Value
Publication number	US-11908712-B2
Application number	US-202117481973-A
Country	US
Kind code	B2
Filing date	Sep 22, 2021
Priority date	Sep 23, 2020
Publication date	Feb 20, 2024
Grant date	Feb 20, 2024

Abstract

A semiconductor manufacturing apparatus including a plurality of process modules for performing desired processes on a plurality of substrates and a plurality of transfer modules for serially transferring the plurality of substrates to the plurality of process modules is provided. The semiconductor manufacturing apparatus comprises a scheduler for calculating a cycle time so that a difference in time required for each of the desired processes is within an allowable time range and generating a transfer plan for the plurality of substrates based on the cycle time, and a transfer controller for controlling the plurality of transfer modules so that the plurality of substrates are serially transferred to the process modules according to the generated transfer plan.

First claim

What is claimed is:

1. A semiconductor manufacturing apparatus including a plurality of process modules for performing desired processes on a plurality of substrates and a plurality of transfer modules for serially transferring the plurality of substrates to the plurality of process modules, the semiconductor manufacturing apparatus comprising:
a scheduler for calculating a cycle time, which is common to each of the plurality of process modules, so that a difference in time required for each of the desired processes of the plurality of process modules is within an allowable time range and generating a transfer plan for the plurality of substrates based on the cycle time; and
a transfer controller for controlling the plurality of transfer modules so that the plurality of substrates are serially transferred to the process modules according to the generated transfer plan.

2. The semiconductor manufacturing apparatus of claim 1 , wherein the scheduler allocates a waiting time for the time required for each of the desired processes so that the time required for each of the desired processes matches the cycle time.

3. The semiconductor manufacturing apparatus of claim 2 , wherein the scheduler calculates the cycle time based on a maximum process time and a maximum transfer time of each of the desired processes.

4. The semiconductor manufacturing apparatus of claim 2 , wherein the scheduler allocates the waiting time by any one of post-process waiting allocated after the desired process, pre-process waiting allocated before the desired process, and immediate unloading allocated within the serial transfer.

5. The semiconductor manufacturing apparatus of claim 1 , wherein the scheduler divides the serial transfer of the substrates by the plurality of transfer modules into a plurality of phases and generates the transfer plan of the plurality of substrates to match a timing of the serial transfer of the substrates divided into the same phases.

6. The semiconductor manufacturing apparatus of claim 5 , wherein the scheduler divides the serial transfer of the substrates by the plurality of transfer modules into transfer of a first row, transfer of a second row, and transfer between the first row and the second row, and generates the transfer plan for the plurality of substrates so that the serial transfer of the substrates is executed in the order of a first phase of performing the transfer of the first row, a second phase of performing the transfer between the first row and the second row, and a third phase of performing the transfer of the second row.

7. A substrate transfer method of a semiconductor manufacturing apparatus including a plurality of process modules for performing desired processes on a plurality of substrates and a plurality of transfer modules for serially transferring the plurality of substrates to the plurality of process modules, the substrate transfer method comprising:
calculating a cycle time, which is common to each of the plurality of process modules, so that a difference in time required for each of the desired processes of the plurality of process modules is within an allowable time range and generating a transfer plan for the plurality of substrates based on the cycle time; and
controlling the plurality of transfer modules so that the plurality of substrates are serially transferred to the process modules according to the generated transfer plan.

8. A program causing a semiconductor manufacturing apparatus including a plurality of process modules for performing desired processes on a plurality of substrates and a plurality of transfer modules for serially transferring the plurality of substrates to the plurality of process modules to:
calculate a cycle time, which is common to each of the plurality of process modules, so that a difference in time required for each of the desired processes of the plurality of process modules is within an allowable time range and generate a transfer plan for the plurality of substrates based on the cycle time; and
control the plurality of transfer modules so that the plurality of substrates are serially transferred to the process modules according to the generated transfer plan.

Assignees

• Tokyo Electron Ltd

Inventors

• Hirata Toshiharu
• Matsuhashi Takafumi
• Takano Kunio
• Nagasawa Minoru

Classifications

• H10P72/0612 Primary

  Production flow monitoring, e.g. for increasing throughput · CPC title

• H10P72/0456 Primary

  in-line arrangement · CPC title

• H10P72/3304

  characterised by movements or sequence of movements of transfer devices · CPC title

• H10P72/0464

  characterised by the construction of the transfer chamber · CPC title

• H10P72/33

  into and out of processing chamber · CPC title