Partial video async support using R-MACPHY device

Patent metadata

Field	Value
Publication number	US-11902605-B2
Application number	US-202218079830-A
Country	US
Kind code	B2
Filing date	Dec 12, 2022
Priority date	Dec 1, 2020
Publication date	Feb 13, 2024
Grant date	Feb 13, 2024

Abstract

Systems and methods for providing timing information from a R-MACHPHY device to a video core while the R-MACPHY device receives video data from the video core while operating in asynchronous mode. In some embodiments, the R-MACPHY device may alternately and selectively configure its mode of operation to alternate between synchronous mode and asynchronous mode, and provide the timing information to the video core when it switches to asynchronous mode.

First claim

The invention claimed is:

1. A remote Distributed Access Architecture (DAA) device operating in ASYNC mode relative to a video core, and comprising:
a clock and a dejitter buffer receiving video packets from the video core;
a processor configured to adjust timing data in video packets received from the dejitter buffer, adjustment based on a discontinuity indicator flag in one or more of the received video packets; where
the DAA device outputs the adjusted timing data to another device.

2. The DAA device of claim 1 comprising a Remote MACPHY Device (RMD).

3. The DAA device of claim 1 comprising a Remote Physical Device (RPD).

4. The DAA device of claim 1 where the processor adjusts the timing data by re-stamping Program Clock Reference (PCR) values in the video packets based on an internal clock of the DAA device.

5. The DAA device of claim 4 where the discontinuity flag indicates a discontinuity in PCR values sent by the video core.

6. The device of claim 1 where the DAA device selectively drops packets received from the dejitter buffer in async mode.

7. A video core comprising:
a clock having a first input configured to receive synchronization information from a selective one of a plurality of sources;
a processor configured to stamp video packets with Program Clock Reference (PCR) values based on the received synchronization information;
a video streamer configured to send a video stream comprising the video packets with their associated PCR values to at least one remote device in a Distributed Access Architecture (DAA); where
the processor is configured to signal to the remote device a discontinuity in the PCR values using a discontinuity flag in the video stream.

8. The video core of claim 7 configured to selectively change the selective one of the plurality of sources from which it receives the synchronization information.

9. The video core of claim 8 where the discontinuity in the PCR values is caused by the change in the selective one of the plurality of sources.

10. A system comprising:
a video core;
a plurality of remote Distributed Access Architecture (DAA) devices in communication with, and operating in ASYNC mode relative to, the video core, the DAA devices receiving from the video core respective video streams, each comprising a plurality of sequential video packets;
the video core receiving timing data from an initial timing source used to stamp the plurality of sequential video packets of the respective video streams with Program Clock Reference (PCR) values; where
the video core is configured to signal to the plurality of DAA devices a discontinuity in the timing data by appending a discontinuity flag to a selected one or more of the PCR values.

11. The system of claim 10 where the video core is configured to receive timing data from a selected one of the DAA devices when the video core loses communication with the initial timing source.

12. The system of claim 11 where the discontinuity in the timing data is caused by switching from the initial timing source to the selected one of the DAA devices as the source of the timing data.

13. The system of claim 11 where the selected one of the DAA devices is a Remote MACPHY (RMD) device.

14. The system of claim 11 where the selected one of the DAA devices is selected by a provisioning server.

15. The system of claim 10 where the DAA devices each modify the PCR values of the sequential packets received based using an internal clock.

16. The system of claim 15 where the DAA devices modify the PCR values of the sequential packets received based on the discontinuity flag.

17. The system of claim 10 where the plurality of DAA devices each have a dejitter buffer and each modifies the video stream.

18. The system of claim 17 where the plurality of DAA devices each use the output of the dejitter buffer to determine an amount of synchronization between the respective DAA device and the vide core.

19. The device of claim 18 where the plurality of DAA devices are each configured to change from async mode to sync mode based on the determined amount of synchronization.

20. The device of claim 18 where the plurality of DAA devices are each configured to change from async mode to sync mode based on the determined amount of synchronization and a determined offset of a fullness of the dejitter buffer from a predetermined amount of fullness.

Assignees

• Arris Entpr Llc

Inventors

• Neugeboren Yair
• Garvey Kevin
• Looney Humphrey
• Dunning Stephen
• Harrison Chris

Classifications

• H04N21/242 Primary

  Synchronisation processes, e.g. processing of PCR [Programme Clock References] {(arrangements for synchronising broadcast or distribution via plural systems in broadcast distribution systems H04H20/18)} · CPC title

• H04H20/78

  CATV [Community Antenna Television] systems · CPC title

• H04N21/23406

  involving management of server-side video buffer · CPC title

• H04N21/64723

  Monitoring of network processes or resources, e.g. monitoring of network load (traffic related reporting in data switching networks H04L43/062) · CPC title

• H04N21/64792

  Controlling the complexity of the content stream, e.g. by dropping packets (intermediate media network packet handling H04L65/765; proxy provisioning conversion or adaptation for reducing the amount or size of exchanged application data H04L67/5651; negotiation of resources in wireless networks H04W28/16) · CPC title