Devices with field effect transistors

US11898983B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11898983-B2
Application numberUS-202118003493-A
CountryUS
Kind codeB2
Filing dateJun 18, 2021
Priority dateJul 2, 2020
Publication dateFeb 13, 2024
Grant dateFeb 13, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Devices and methods of using the devices are disclosed which can provide scalability, improved sensitivity and reduced noise for sequencing polynucleotide. Examples of the devices include a biological or solid-state nanopore, a field effect transistor (FET) sensor with improved gate controllability over the channel, and a porous structure.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: a middle well comprising a fluidic tunnel; a cis well associated with a cis electrode, wherein a first nanoscale opening is disposed between the cis well and the middle well; a trans well associated with a trans electrode, wherein a porous structure is disposed between the trans well and the middle well; and a field effect transistor (FET) positioned between the first nanoscale opening and the porous structure, the FET comprising: a source, a drain, and a channel connecting the source to the drain, wherein the channel comprises a gate oxide layer having an upper surface fluidically exposed to the middle well, wherein the middle well fluidically connects the cis well to the trans well, and wherein the fluidic tunnel does not extend through the channel. 2. The device as defined in claim 1 , wherein the FET is a nanowire transistor. 3. The device as defined in claim 2 , wherein the channel has a length along a direction from the source to the drain, a height along a direction from the cis electrode to the trans electrode, and a width along a direction at least substantially orthogonal to both the length and the height, and wherein the length is at least about 10 times the width or the height. 4. The device as defined in claim 3 , wherein a boundary of the fluidic tunnel in a plane defined by the length and the width is disc shaped. 5. The device as defined in claim 1 , wherein the FET is a nanosheet transistor. 6. The device as defined in claim 5 , wherein the channel has a length along a direction from the source to the drain, a height along a direction from the cis electrode to the trans electrode, and a width along a direction at least partially orthogonal to both the length and the height, wherein the length is at least about 5 times the height, and wherein the width is at least about 5 times the height. 7. The device as defined in claim 6 , wherein a boundary of the fluidic tunnel in a plane defined by the length and the width is oblong shaped. 8. The device as defined in claim 1 , wherein the porous structure comprises a SiCOH film. 9. The device as defined in claim 1 , further comprising a membrane positioned between the cis well and the middle well, wherein the first nanoscale opening extends through the membrane. 10. The device as defined in claim 1 , wherein the gate oxide layer has a thickness between about 1 to about 10 nm. 11. The device as defined in claim 1 , wherein the gate oxide layer has a thickness between about 2 and about 4 nm. 12. A device, comprising: a middle well; a cis well associated with a cis electrode, wherein a first nanoscale opening is disposed between the cis well and the middle well; a trans well associated with a trans electrode, wherein a second nanoscale opening is disposed between the trans well and the middle well; and a field effect transistor (FET) positioned between the first nanoscale opening and the second nanoscale opening, the FET comprising: a source, a drain, and a channel connecting the source to the drain, wherein the channel comprises a gate oxide layer operably connected to a metal structure, wherein the gate oxide layer is not fluidically exposed, wherein the middle well fluidically connects the cis well to the trans well, and wherein the metal structure has at least one surface fluidically exposed to the middle well. 13. The device as defined in claim 12 , wherein the at least one fluidically exposed surface of the metal structure is formed of a corrosion-resistant material. 14. The device as defined in claim 12 , wherein the metal structure has at least one partially vertical surface, at least two partially vertical surfaces, at least one partially horizontal surface, at least two partially horizontal surfaces, or any combination thereof, fluidically exposed to the middle well, wherein a vertical direction is a direction from the cis electrode to the trans electrode, and wherein a horizontal direction is orthogonal to the vertical direction. 15. The device as defined in claim 12 , wherein the metal structure has at least one cup-shaped substructure fluidically exposed to the middle well. 16. The device as defined in claim 12 , wherein a portion of the metal structure fluidically exposed to the middle well comprises at least one hole or opening. 17. The device as defined in claim 12 , wherein a portion of the metal structure fluidically exposed to the middle well comprises at least two holes or openings. 18. A device, comprising: a middle well comprising a fluidic tunnel; a cis well associated with a cis electrode, wherein a first nanoscale opening is disposed between the cis well and the middle well; a trans well associated with a trans electrode, wherein a second nanoscale opening is disposed between the trans well and the middle well; and a field effect transistor (FET) positioned between the first nanoscale opening and the second nanoscale opening, the FET comprising: a source, a drain, and a channel connecting the source to the drain, wherein the channel comprises a gate oxide layer having an upper surface fluidically exposed to the middle well, wherein the middle well fluidically connects the cis well to the trans well, wherein the fluidic tunnel does not extend through the channel, wherein the gate oxide layer further comprises a lower surface fluidically exposed to the middle well. 19. The device as defined in claim 18 , wherein the FET is a nanowire transistor. 20. The device as defined in claim 19 , wherein the channel has a length along a direction from the source to the drain, a height along a direction from the cis electrode to the trans electrode, and a width along a direction at least substantially orthogonal to both the length and the height, and wherein the length is at least about 10 times the width or the height. 21. The device as defined in claim 20 , wherein a boundary of the fluidic tunnel in a plane defined by the length and the width is disc shaped. 22. The device as defined in claim 18 , wherein the FET is a nanosheet transistor. 23. The device as defined in claim 22 , wherein the channel has a length along a direction from the source to the drain, a height along a direction from the cis electrode to the trans electrode, and a width along a direction at least partially orthogonal to both the length and the height, wherein the length is at least about 5 times the height, and wherein the width is at least about 5 times the height. 24. The device as defined in claim 23 , wherein a boundary of the fluidic tunnel in a plane defined by the length and the width is oblong shaped. 25. The device as defined in claim 18 , further comprising a membrane positioned between the cis well and the middle well, wherein the first nanoscale opening extends through the membrane. 26. The device as defined in claim 18 , wherein the gate oxide layer has a thickness between about 1 to about 10 nm. 27. The device as defined in claim 18 , wherein the gate oxide layer has a thickness between about 2 and about 4 nm. 28. The device as defined in claim 18 , wherein the device comprises a nanopore sequencer.

Assignees

Inventors

Classifications

  • involving nanosized elements, e.g. nanotubes, nanowires · CPC title

  • Investigating individual macromolecules, e.g. by translocation through nanopores (Coulter counters in general G01N15/12; fabrication methods for nanoscale apertures B81B1/00; sequencing of nucleic acids C12Q1/68) · CPC title

  • specially adapted for biomolecules, e.g. gate electrode with immobilised receptors · CPC title

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What does patent US11898983B2 cover?
Devices and methods of using the devices are disclosed which can provide scalability, improved sensitivity and reduced noise for sequencing polynucleotide. Examples of the devices include a biological or solid-state nanopore, a field effect transistor (FET) sensor with improved gate controllability over the channel, and a porous structure.
Who is the assignee on this patent?
Illumina Inc
What technology area does this patent fall under?
Primary CPC classification G01N27/4146. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 13 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).