Analog-to-digital converter having punctured quantizer

Patent metadata

Field	Value
Publication number	US-11894864-B2
Application number	US-202217701742-A
Country	US
Kind code	B2
Filing date	Mar 23, 2022
Priority date	Mar 23, 2022
Publication date	Feb 6, 2024
Grant date	Feb 6, 2024

Abstract

In one embodiment, an analog-to-digital converter includes: a sum circuit to receive an analog input signal and a feedback reference signal and generate a sum signal; a feedback circuit coupled to the sum circuit to provide the feedback reference signal to the sum circuit; a filter coupled to the sum circuit to receive the sum signal and generate a filtered signal; and a punctured quantizer coupled to the filter to receive the filtered signal and quantize the filtered signal to a digital output and to output the digital output and to provide the digital output to the feedback circuit.

First claim

What is claimed is:

1. An apparatus comprising:
a sum circuit to receive an analog input signal and a feedback reference signal and generate a sum signal;
a feedback circuit coupled to the sum circuit to provide the feedback reference signal to the sum circuit;
a filter coupled to the sum circuit to receive the sum signal and generate a filtered signal; and
a punctured quantizer coupled to the filter to receive the filtered signal and quantize the filtered signal to a digital output and to output the digital output and to provide the digital output to the feedback circuit, the punctured quantizer comprising a non-linear quantizer having a plurality of levels, the plurality of levels related but having one or more gaps between at least some of the plurality of levels.

2. The apparatus of claim 1 , wherein the one or more gaps comprise at least one linear level between each of the plurality of levels, wherein the plurality of levels are non-linearly related.

3. The apparatus of claim 1 , wherein the plurality of levels are programmable.

4. The apparatus of claim 1 , wherein the punctured quantizer further comprises:
a plurality of comparators, each of the plurality of comparators to compare the filtered signal to a corresponding reference voltage level of the plurality of levels and to provide a comparison decision; and
a logic circuit coupled to the plurality of comparators, the logic circuit to generate a plurality of outputs based on the comparison decision of the plurality of comparators.

5. The apparatus of claim 4 , wherein the logic circuit, in response to the comparison decision from a first one of the plurality of comparators that indicates that the filtered signal exceeds a first reference voltage level, is to send a control signal to the feedback circuit to cause the feedback circuit to provide the feedback reference signal having a level that exceeds a magnitude of the first reference voltage level.

6. The apparatus of claim 4 , further comprising a plurality of second filters, each of the plurality of second filters to receive one of the plurality of outputs and generate a filtered decimated value therefrom.

7. The apparatus of claim 6 , further comprising:
a plurality of scaling elements, each of the plurality of scaling elements coupled to one of the plurality of second filters to scale the filtered decimated value from the corresponding second filter; and
a second sum circuit to receive the scaled filtered decimated values and to generate the digital output therefrom.

8. The apparatus of claim 6 , wherein the logic circuit is to provide a feedback control signal to the feedback circuit to cause the feedback circuit to provide a selected one of the plurality of feedback reference signals to the sum circuit.

9. The apparatus of claim 1 , further comprising a sigma-delta modulator comprising a non-linear N-th order modulator, the sigma-delta modulator comprising the filter, the quantizer and the feedback circuit.

10. The apparatus of claim 1 , wherein the apparatus comprises a non-linear sigma-delta analog-to-digital converter (ADC), the non-linear sigma-delta ADC to receive the analog input signal with a dynamic range having a first range, the non-linear sigma-delta ADC having a signal to noise and distortion ratio that is intentionally limited to a substantially fixed saturation level regardless of a magnitude of the analog input signal.

11. The apparatus of claim 1 , further comprising an offset circuit, wherein the offset circuit is to compensate for an offset based at least in part on the digital output.

12. A method comprising:
receiving, in a sum circuit of an analog-to-digital converter (ADC), an analog input signal and summing the analog input signal with a feedback reference signal to generate a sum signal;
filtering, in a filter of the ADC, the sum signal to output a filtered signal;
quantizing, in a punctured quantizer of the ADC, the filtered signal to form a quantized signal, the punctured quantizer having more than two levels, wherein at least some of the more than two levels are non-linear; and
generating a digital output based on the quantized signal, the digital output corresponding to the analog input signal.

13. The method of claim 12 , further comprising:
sending a control signal from the punctured quantizer to a feedback circuit to cause the feedback circuit to generate the feedback reference signal, wherein the feedback circuit is to generate, in response to the control signal, the feedback reference signal with a selected one of more than two feedback levels, wherein at least some of the more than two feedback levels are non-linear.

14. The method of claim 12 , further comprising sending a representation of the digital output to a machine learning classifier, wherein the machine learning classifier is to determine if the analog input signal is a trigger, based at least in part on the digital output.

15. The method of claim 12 , wherein the quantized signal comprises a digital encoding, and further comprising scaling the digital encoding with a plurality of scaling elements, each of the plurality of scaling elements associated with one of the more than two levels.

16. The method of claim 15 , further comprising summing a scaled output from each of the plurality of scaling elements to generate the digital output.

17. An apparatus comprising:
an audio sensor to receive an audio signal;
at least one amplifier to provide gain to the audio signal;
a noise shaping sigma-delta analog-to digital converter (ADC) coupled to the at least one amplifier, the noise shaping sigma-delta ADC comprising:
a filter to receive an analog representation of the audio signal and generate a filtered signal; and
a punctured quantizer coupled to the filter to receive the filtered signal and quantize the filtered signal to a digital output, the punctured quantizer having more than two levels, wherein the more than two levels have a non-linear relationship; and

a controller coupled to the noise shaping sigma-delta ADC, the controller to receive the digital output and perform an operation based at least in part on the digital output.

18. The apparatus of claim 17 , wherein the noise shaping sigma-delta ADC is configured with a signal to noise and distortion ratio (SNDR) that increases with a level of the analog representation to a predetermined level at which the SNDR reaches a maximum level, the maximum level below a dynamic range of the noise shaping sigma-delta ADC.

19. The apparatus of claim 17 , wherein the punctured quantizer comprises:
a plurality of comparators, each of the plurality of comparators to compare the filtered signal to a corresponding reference voltage level of the more than two levels and to provide a comparison decision; and
a logic circuit coupled to the plurality of comparators, the logic circuit to generate a digital encoding based on the comparison decision of the plurality of comparators, wherein the digital encoding is to be scaled and summed to generate the digital output.

Assignees

• Silicon Lab Inc

Inventors

• Khoury John M

Classifications

• H03M3/422 Primary

  having one quantiser only · CPC title

• H03F3/183

  with semiconductor devices only · CPC title

• H03M3/356

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M3/494) · CPC title

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

• H04R3/02

  for preventing acoustic reaction {, i.e. acoustic oscillatory feedback (specially adapted for hearing aids H04R25/453)} · CPC title