Schmitt trigger circuit

Patent metadata

Field	Value
Publication number	US-11894849-B2
Application number	US-202217965788-A
Country	US
Kind code	B2
Filing date	Oct 14, 2022
Priority date	Nov 24, 2021
Publication date	Feb 6, 2024
Grant date	Feb 6, 2024

Abstract

The present invention provides a Schmitt trigger circuit in which chattering does not occur in the output of the Schmitt trigger circuit even when it is connected to a communication bus without impedance matching and reflected noise is superimposed on the input signal. The Schmitt trigger circuit includes: a first signal detection circuit; a second signal detection circuit; a latch circuit; a selection signal generation circuit; a first input port; and a first output port. The first signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The second signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The latch circuit is connected to the selection signal generation circuit and the output port. The selection signal generation circuit includes a delay circuit.

First claim

What is claimed is:

1. A Schmitt trigger circuit comprising:
a first signal detection circuit;
a second signal detection circuit;
a latch circuit;
a switch connected to an output port of the latch circuit;
an enable input port;
a selection signal generation circuit;
a first input port; and
a first output port,
wherein the first signal detection circuit comprises a second input port, a first selection signal input port, and a second output port, wherein the first input port is connected to the second input port, the first selection signal input port is connected to the selection signal generation circuit, and the second output port is connected to one input of the latch circuit,
wherein the second signal detection circuit comprises a third input port, a second selection signal input port, and a third output port, wherein the first input port is connected to the third input port, the second selection signal input port is connected to the selection signal generation circuit, and the third output port is connected to another input of the latch circuit,
wherein the latch circuit is connected to the selection signal generation circuit and the first output port, and
wherein the selection signal generation circuit comprises a delay circuit. ,
wherein the enable input port is connected to the selection signal generation circuit and the switch, the selection signal generation circuit causes the first signal detection circuit to output a high-level signal and the second signal detection circuit to output a low-level signal according to a signal at the enable input port, and the switch is connected between an output port of the latch circuit and a GND port.

2. The Schmitt trigger circuit according to claim 1 , wherein the latch circuit is an RS latch circuit.

3. The Schmitt trigger circuit according to claim 1 , wherein an absolute value of a detected voltage of the first signal detection circuit is greater than an absolute value of a detected voltage of the second signal detection circuit.

4. The Schmitt trigger circuit according to claim 2 , wherein an absolute value of a detected voltage of the first signal detection circuit is greater than an absolute value of a detected voltage of the second signal detection circuit.

Assignees

• Ablic Inc

Inventors

• Kanno Junichi
• Imai Yasushi

Classifications

• H03K3/3565 Primary

  Bistables with hysteresis, e.g. Schmitt trigger · CPC title

• H03K3/013

  Modifications of generator to prevent operation by noise or interference · CPC title

• H03K3/2893

  Bistables with hysteresis, e.g. Schmitt trigger · CPC title

• H03K3/0377 Primary

  Bistables with hysteresis, e.g. Schmitt trigger (non-regenerative amplitude discriminators G01R19/165) · CPC title