Silicon carbide semiconductor device and power converter

Patent metadata

Field	Value
Publication number	US-11894428-B2
Application number	US-201917427090-A
Country	US
Kind code	B2
Filing date	Mar 18, 2019
Priority date	Mar 18, 2019
Publication date	Feb 6, 2024
Grant date	Feb 6, 2024

Abstract

The present invention relates to a silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor and includes a first trench provided through first and second semiconductor regions in a thickness direction and reaches inside a semiconductor layer, a second trench provided through the second semiconductor region in the thickness direction and reaches inside the semiconductor layer, a gate electrode embedded in the first trench via a gate insulating film, a Schottky barrier diode electrode embedded in the second trench, a first low-resistance layer having contact with a trench side wall of the first trench, and a second low-resistance layer having contact with a trench side wall of the second trench. The second low-resistance layer has an impurity concentration that is higher than the impurity concentration in the semiconductor layer and lower than the impurity concentration in the first low-resistance layer.

First claim

The invention claimed is:

1. A silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor, the silicon carbide semiconductor device comprising:
a semiconductor layer of a first conductivity type;
a first semiconductor region of the first conductivity type provided in an upper layer portion of the semiconductor layer;
a second semiconductor region of a second conductivity type provided in contact with a bottom face of the first semiconductor region;
a first trench provided through the first semiconductor region and the second semiconductor region in a thickness direction and having a bottom face that reaches inside the semiconductor layer;
a gate electrode embedded in the first trench via a gate insulating film that covers an inner face of the first trench;
an interlayer insulation film having a contact portion above the first semiconductor region;
a first low-resistance layer of the first conductivity type provided in the semiconductor layer to have contact with at least one trench side wall of the first trench in a direction perpendicular to a direction of extension of the first trench;
a second trench provided through the second semiconductor region in the thickness direction and having a bottom face that reaches inside the semiconductor layer;
a Schottky barrier diode electrode embedded in the second trench;
a second low-resistance layer of the first conductivity type provided in the semiconductor layer to have contact with at least one trench side wall of the second trench in a direction perpendicular to a direction parallel to a direction of extension of the second trench;
a first main electrode embedded in the contact portion and covering the interlayer insulation film; and
a second main electrode provided on a main surface of the semiconductor layer on a side opposite to a side on which the first main electrode is provided,
wherein the second low-resistance layer has an impurity concentration higher than an impurity concentration in the semiconductor layer and lower than an impurity concentration in the first low-resistance layer.

2. The silicon carbide semiconductor device according to claim 1 , wherein
at least one of the first low-resistance layer and the second low-resistance layer is provided to a position deeper than bottoms of the first trench and the second trench.

3. The silicon carbide semiconductor device according to claim 1 , wherein
at least one of the first low-resistance layer and the second low-resistance layer is provided to a position shallower than bottoms of the first trench and the second trench.

4. The silicon carbide semiconductor device according to claim 1 , wherein
at least one of the first low-resistance layer and the second low-resistance layer is provided to cover bottoms of the first trench and the second trench.

5. The silicon carbide semiconductor device according to claim 1 , further comprising:
a third low-resistance layer provided in contact with a side face of at least one of the first low-resistance layer and the second low-resistance layer and having a higher impurity concentration of the first conductivity type than the first low-resistance layer and the second low-resistance layer.

6. The silicon carbide semiconductor device according to claim 1 , further comprising:
a protective layer of the second conductivity type provided in contact with at least part of bottoms of the first trench and the second trench.

7. The silicon carbide semiconductor device according to claim 6 , comprising:
a connection layer of the second conductivity type provided in contact with a trench side wall of the first trench on a side opposite to a side on which the first low-resistance layer is provided, and in contact with a trench side wall of the second trench on a side opposite to a side on which the second low-resistance layer is provided,
wherein the connection layer is connected to the protective layer and connected to the second semiconductor region.

8. The silicon carbide semiconductor device according to claim 7 , wherein
the first trench and the second trench are arranged side by side, and
the connection layer provided in contact with the trench side wall of the first trench and the connection layer provided in contact with the trench side wall of the second trench are arranged facing each other.

9. The silicon carbide semiconductor device according to claim 1 , wherein
the first low-resistance layer and the second low-resistance layer are arranged with side faces having contact with each other on sides opposite to sides on which the first low-resistance layer and the second low-resistance layer are respectively in contact with the first trench and the second trench.

10. A silicon carbide semiconductor device that includes a Schottky barrier diode in a field-effect transistor, the silicon carbide semiconductor device comprising:
a semiconductor layer of a first conductivity type;
a first semiconductor region of the first conductivity type provided in an upper layer portion of the semiconductor layer;
a second semiconductor region of a second conductivity type provided with at least part of the second semiconductor region being in contact with a bottom face of the first semiconductor region and at least part of the second semiconductor region being provided in an upper layer portion of the semiconductor layer;
a plurality of trenches provided in parallel with one another through the first semiconductor region and the second semiconductor region in a depth direction, and each having a bottom face that reaches inside the semiconductor layer;
a gate electrode embedded in the plurality of trenches via a gate insulating film that covers inner faces of the plurality of trenches;
an interlayer insulation film having a contact portion above the first semiconductor region;
a first low-resistance layer of the first conductivity type provided in the semiconductor layer to have contact with at least one trench side walls of the plurality of trenches in a direction perpendicular to a direction of extension of the plurality of trenches;
a Schottky barrier diode electrode provided on the semiconductor layer between each adjacent pair of the plurality of trenches;
a second low-resistance layer of the first conductivity type provided in an upper layer portion of the semiconductor layer formed between each adjacent pair of the plurality of trenches to have contact with the Schottky barrier diode electrode;
a first main electrode covering the interlayer insulation film and embedded in the contact portion; and
a second main electrode provided on a main surface of the semiconductor layer on a side opposite to a side on which the first main electrode is provided,
wherein the second semiconductor region provided in the upper layer portion of the semiconductor layer is provided to sandwich the second low-resistance layer between the adjacent pair of the plurality of trenches, and
the second low-resistance layer has an impurity concentration higher than an impurity concentration of the semiconductor layer and lower than an impurity concentration of the first low-resistance layer.

11. The silicon carbide semiconductor device according to claim 10 , wherein
the first low-resistance layer is provided to a position deeper than bottoms of the plurality of trenches, and
the second low-resistance layer is provided to a position deeper than a bottom of the second semiconductor region.

12. The silicon carbide semiconductor device according to claim 10 , wherein
the first low-resistance layer is provided to a position deeper than bottoms of the plurality of trenches, and
the sec

Assignees

• Mitsubishi Electric Corp

Inventors

• Hatta Hideyuki
• Tanaka Rina
• Sugawara Katsutoshi
• Fukui Yutaka

Classifications

• H10D62/129

  Cathode regions of diodes · CPC title

• H10D8/60 Primary

  Schottky-barrier diodes · CPC title

• H10D84/146

  the built-in components being Schottky barrier diodes · CPC title

• H10D12/031

  of IGBTs · CPC title

• H10D8/051

  of Schottky diodes · CPC title