Multilayer ceramic electronic component

Patent metadata

Field	Value
Publication number	US-11894192-B2
Application number	US-202117466458-A
Country	US
Kind code	B2
Filing date	Sep 3, 2021
Priority date	Feb 24, 2021
Publication date	Feb 6, 2024
Grant date	Feb 6, 2024

Abstract

A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer having a main component represented by (Ba 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y )O 3 (where, 0≤x≤1, 0≤y≤0.5), and having a plurality of grains and grain boundaries disposed between the plurality of grains, and including first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween; a first external electrode; and a second external electrode, wherein the dielectric layer includes a triple point in contact with three grain boundaries and a secondary phase of Si disposed inside the triple point, wherein a dispersion of an Si content at an interface between the dielectric layer and the internal electrode may be 1% by weight or less.

First claim

What is claimed is:

1. A multilayer ceramic electronic component, comprising:
a ceramic body including a dielectric layer having a main component represented by (Ba 1-x Ca x )(Ti 1-y (Zr, Sn, Hf) y )O 3 (where, 0≤x≤1, 0≤y≤0.5), and having a plurality of grains and grain boundaries disposed between the plurality of grains, and including first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween;
a first external electrode connected to the first internal electrode; and
a second external electrode connected to the second internal electrode,
wherein the dielectric layer comprises a triple point disposed in contact with three grain boundaries and a secondary phase of Si disposed inside the triple point,
wherein a dispersion of an Si content at an interface between the dielectric layer and the internal electrode is 1% by weight or less.

2. The multilayer ceramic electronic component of claim 1 , wherein a ratio (b/a) of an average Si content (b) of the triple point to an average Si content (a) inside a grain of the plurality of grains is within a range of exceeding 3 and/or less than 6.

3. The multilayer ceramic electronic component of claim 1 , wherein the dielectric layer comprises a first subcomponent including one or more of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb,
wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in at least one of the grain boundaries.

4. The multilayer ceramic electronic component of claim 3 , wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in the triple point.

5. The multilayer ceramic electronic component of claim 1 , wherein at least one of the plurality of grains has an average particle diameter of 300 nm or less.

6. The multilayer ceramic electronic component of claim 1 , wherein the dielectric layer has an average thickness of 0.5 μm or less.

7. The multilayer ceramic electronic component of claim 1 , wherein a secondary phase of Si at an interface between the dielectric layer and the internal electrode has an average content of 0.1 mol % or less.

8. The multilayer ceramic electronic component of claim 1 , further comprising a non-detection region of a secondary phase of Si disposed at an interface between the dielectric layer and the internal electrode.

9. The multilayer ceramic electronic component of claim 1 , wherein the dielectric layer comprises a second subcomponent including Mg,
wherein a secondary phase of Mg at an interface between the dielectric layer and the internal electrode has an average content of 0.1 mol % or less.

10. The multilayer ceramic electronic component of claim 1 , wherein the dielectric layer and/or the internal electrode comprises Sn,
wherein a region in which a region in the dielectric layer and/or the internal electrode, having a maximum content of Sn, is disposed at an interface between the dielectric layer and the internal electrode.

11. The multilayer ceramic electronic component of claim 1 , wherein the first internal electrode and/or the second internal electrode has an average thickness of 0.5 μm or less.

12. A multilayer ceramic electronic component, comprising:
a ceramic body including:
a dielectric layer including a main component, and a plurality of grains with grain boundaries disposed between the plurality of grains; and
first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween,
wherein the dielectric layer comprises a triple point disposed in contact with three grain boundaries and a secondary phase of Si disposed inside the triple point,
wherein a dispersion of an Si content at an interface between the dielectric layer and the internal electrode is 1% by weight or less.

13. The multilayer ceramic electronic component of claim 12 , wherein a ratio (b/a) of an average Si content (b) of the triple point to an average Si content (a) inside a grain of the plurality of grains is within a range of exceeding 3 and/or less than 6.

14. The multilayer ceramic electronic component of claim 12 , wherein the dielectric layer comprises a first subcomponent including one or more of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb,
wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in at least one of the grain boundaries.

15. The multilayer ceramic electronic component of claim 14 , wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in the triple point.

16. The multilayer ceramic electronic component of claim 12 , wherein at least one of the plurality of grains has an average particle diameter of 300 nm or less.

17. The multilayer ceramic electronic component of claim 12 , wherein the dielectric layer has an average thickness of 0.5 μm or less.

18. The multilayer ceramic electronic component of claim 12 , wherein a secondary phase of Si at an interface between the dielectric layer and the internal electrode has an average content of 0.1 mol % or less.

19. The multilayer ceramic electronic component of claim 12 , further comprising a non-detection region of a secondary phase of Si disposed at an interface between the dielectric layer and the internal electrode.

20. The multilayer ceramic electronic component of claim 12 , wherein the dielectric layer comprises a second subcomponent including Mg,
wherein a secondary phase of Mg at an interface between the dielectric layer and the internal electrode has an average content of 0.1 mol % or less.

21. A multilayer ceramic electronic component, comprising:
a ceramic body including:
a dielectric layer including a main component, and a plurality of grains with grain boundaries disposed between the plurality of grains; and
first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween,
wherein the dielectric layer comprises a triple point disposed in contact with three grain boundaries and a secondary phase of Si disposed inside the triple point,
wherein a secondary phase of Si at an interface between the dielectric layer and the internal electrode has an average content of 0.1 mol % or less, and
wherein a ratio (b/a) of an average Si content (b) of the triple point to an average Si content (a) inside a grain of the plurality of grains is within a range of exceeding 3 and/or less than 6.

22. The multilayer ceramic electronic component of claim 21 , wherein the dielectric layer comprises a first subcomponent including one or more of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Eu, Tm, La, Lu, and Yb,
wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in at least one of the grain boundaries.

23. The multilayer ceramic electronic component of claim 22 , wherein a region in the dielectric layer, having a maximum content of the first subcomponent, is disposed in the triple point.

24. The multilayer ceramic electronic component of claim 21 , wherein at least one of the plurality of grains has an average particle diameter of 300 nm or less.

25. The multilayer ceramic electronic component of claim 21 , wherein the dielectric layer has an average thickness of 0.5 μm or less.

26. The multilayer ceramic electronic component of claim 21 , further comprising a n

Assignees

• Samsung Electro Mech

Inventors

• Baik Seung In
• Chun Hee Sun
• Park Jae Sung
• Kim Hyoung Uk

Classifications

• H01G4/1227 Primary

  based on alkaline earth titanates · CPC title

• C04B35/4682

  based on BaTiO3 perovskite phase · CPC title

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/008

  Selection of materials · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title