Method and apparatus for data decoding in communication or broadcasting system

Patent metadata

Field	Value
Publication number	US-11876534-B2
Application number	US-202117526088-A
Country	US
Kind code	B2
Filing date	Nov 15, 2021
Priority date	Sep 10, 2019
Publication date	Jan 16, 2024
Grant date	Jan 16, 2024

Abstract

A method may include, and/or a device may be configured for: receiving, from a transmitting device, a signal corresponding to input bits; performing demodulation based on the signal to determine values corresponding to the input bits; identifying a number of the input bits based on the signal; identifying a base matrix and a lifting size based on the number of the input bits; identifying a parity check matrix based on the base matrix; determining a number of layers based on the lifting size and a number of the values; determining an order of layers for low density parity check (LDPC) decoding based on the number of layers; and performing the LDPC decoding to determine the input bits based on the values, the parity check matrix, and the order of layers.

First claim

What is claimed is:

1. A method for low density parity check (LDPC) decoding performed by a receiving device in a wireless communication system, the method comprising:
receiving, from a transmitting device, a signal corresponding to input bits;
performing demodulation based on the signal to determine values corresponding to the input bits;
identifying a number of the input bits based on the signal;
identifying a base matrix and a lifting size based on the number of the input bits;
identifying a parity check matrix based on the base matrix;
determining a number of layers based on the lifting size and a number of the values;
determining an order of layers for the LDPC decoding based on the number of layers; and
performing the LDPC decoding to determine the input bits based on the values, the parity check matrix, and the order of layers.

2. The method of claim 1 , wherein determining the number of layers is performed further based on a number of punctured input bits at the transmitting device, and
wherein the number of punctured input bits is a multiple of the lifting size.

3. The method of claim 1 , wherein the layers include at least four row blocks in the parity check matrix regardless of the lifting size and the number of values.

4. The method of claim 1 , wherein determining the number of layers is performed further based on a number of shortened input bits at the transmitting device.

5. The method of claim 1 , wherein determining the number of layers is performed further based on a redundancy version (RV).

6. The method of claim 1 , wherein a predetermined sequence is further used to determine the order of layers for the LDPC decoding.

7. The method of claim 6 , wherein the order of layers for the LDPC decoding is determined based on a sequence including a set of numbers less than a number of layers in the predetermined sequence.

8. The method of claim 6 , wherein the predetermined sequence includes values including:
42, 40, 26, 34, 37, 45, 30, 32, 22, 28, 38, 44, 41, 20, 27, 25, 31, 36, 39, 13, 33, 35, 24, 29, 43, 17, 23, 18, 21, 14, 6, 10, 16, 1, 4, 19, 7, 12, 15, 9, 5, 11, 8, 0, 2, 3.

9. The method of claim 6 , wherein the predetermined sequence is identified based on a modulation order.

10. The method of claim 1 , wherein the values include at least one of a log likelihood ratio (LLR) or likelihood ratio (LR).

11. A receiving device for low density parity check (LDPC) decoding in a wireless communication system, the receiving device comprising:
a transceiver; and
a controller coupled with the transceiver and configured to:
receive, from a transmitting device, a signal corresponding to input bits,
perform demodulation based on the signal to determine values corresponding to the input bits,
identify a number of the input bits based on the signal,
identify a base matrix and a lifting size based on the number of the input bits,
identify a parity check matrix based on the base matrix,
determine a number of layers based on the lifting size and a number of the values,
determine an order of layers for the LDPC decoding based on the number of layers, and
perform the LDPC decoding to determine the input bits based on the values, the parity check matrix, and the order of layers.

12. The receiving device of claim 11 , wherein the number of layers is determined further based on a number of punctured input bits at the transmitting device, and
wherein the number of punctured input bits is a multiple of the lifting size.

13. The receiving device of claim 11 , wherein the layers include at least four row blocks in the parity check matrix regardless of the lifting size and the number of values.

14. The receiving device of claim 11 , wherein the number of layers is determined further based on a number of shortened input bits at the transmitting device.

15. The receiving device of claim 11 , wherein the number of layers is determined further based on a redundancy version (RV).

16. The receiving device of claim 11 , wherein a predetermined sequence is further used to determine the order of layers for the LDPC decoding.

17. The receiving device of claim 16 , wherein the order of layers for the LDPC decoding is determined based on a sequence including a set of numbers less than a number of layers in the predetermined sequence.

18. The receiving device of claim 16 , wherein the predetermined sequence includes values including:
42, 40, 26, 34, 37, 45, 30, 32, 22, 28, 38, 44, 41, 20, 27, 25, 31, 36, 39, 13, 33, 35, 24, 29, 43, 17, 23, 18, 21, 14, 6, 10, 16, 1, 4, 19, 7, 12, 15, 9, 5, 11, 8, 0, 2, 3.

19. The receiving device of claim 16 , wherein the predetermined sequence is identified based on a modulation order.

20. The receiving device of claim 11 , wherein the values include at least one of a log likelihood ratio (LLR) or likelihood ratio (LR).

Assignees

• Samsung Electronics Co Ltd

Inventors

• Myung Seho
• Jang Min
• Kwon Yangsoo
• Yeo Jeongho
• Jeong Hongsil

Classifications

• H03M13/1102 Primary

  Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title

• H03M13/616

  Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations · CPC title

• H04L1/0057

  Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title

• H04L25/03184

  Details concerning the metric · CPC title

• G16Y10/75

  Information technology; Communication · CPC title