Vertical transistor having an oxygen-blocking top spacer
US-11476346-B2 · Oct 18, 2022 · US
US11876124B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11876124-B2 |
| Application number | US-202217811129-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 7, 2022 |
| Priority date | Jun 24, 2020 |
| Publication date | Jan 16, 2024 |
| Grant date | Jan 16, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Embodiments of the invention are directed to a semiconductor device that includes a channel fin; a trench adjacent to an upper region of the channel fin; and an oxygen-blocking layer within the trench. The oxygen-blocking layer includes an oxygen gettering material configured to remove oxygen from an environment to which the oxygen-blocking layer is exposed.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a channel fin; a trench adjacent to an upper region of the channel fin; and an oxygen-blocking layer within the trench; wherein the oxygen-blocking layer comprises an oxygen gettering material configured to remove, through chemical combination, oxygen from an environment to which the oxygen-blocking layer is exposed. 2. The device of claim 1 further comprising a top spacer within the trench. 3. The device of claim 2 , wherein: the top spacer is over a central portion of the oxygen-blocking layer; and a sidewall portion of the oxygen-blocking layer is between the top spacer and a sidewall of the upper region of the channel fin. 4. The device of claim 2 , wherein the trench includes a substantially U-shaped bottom region. 5. The device of claim 4 , wherein the oxygen blocking layer is in a first portion of the substantially U-shaped bottom region. 6. The device of claim 5 , wherein the top spacer is in a second portion of the substantially U-shaped bottom region. 7. The device of claim 1 , wherein the chemical combination comprises the oxygen-blocking layer chemically combining with the oxygen. 8. The device of claim 1 , wherein the oxygen gettering material comprises an aluminum (Al) containing material. 9. The device of claim 8 , wherein the Al containing material comprises aluminum monoxide (AlO) or aluminum monocarbide (AlC). 10. A semiconductor device comprising: a channel fin over a substrate; a trench adjacent to an upper region of the channel fin; an oxygen-blocking layer within a first portion of the trench; and a doped source or drain (S/D) region within a second portion of the trench; wherein the oxygen-blocking layer comprises an oxygen gettering material configured to remove, through absorption or chemical combination, oxygen from an environment to which the oxygen-blocking layer is exposed. 11. The device of claim 10 further comprising a top spacer within a third potion of the trench. 12. The device of claim 11 , wherein the top spacer is over a central portion of the oxygen-blocking layer. 13. The device of claim 12 , wherein a sidewall portion of the oxygen-blocking layer is between the top spacer and a sidewall of the upper region of the channel fin. 14. The device of claim 13 , wherein; the sidewall portion of the oxygen-blocking layer is coupled to the sidewall of the upper region of the channel fin; and the oxygen gettering material is further configured to remove oxygen from an element of the semiconductor device to which the oxygen-blocking layer is coupled. 15. The device of claim 11 , wherein: the trench includes a substantially U-shaped bottom region; the oxygen blocking layer is in the substantially U-shaped bottom region; and the top spacer is in the substantially U-shaped bottom region. 16. The device of claim 10 , wherein the chemical combination comprises the oxygen gettering material of the oxygen-blocking layer configured to remove the oxygen by chemically combining with the oxygen. 17. The device of claim 10 , wherein the absorption comprises the oxygen gettering material of the oxygen-blocking layer configured to remove the oxygen by absorbing the oxygen. 18. The device of claim 10 , wherein the oxygen gettering material comprises an aluminum (Al) containing material. 19. The device of claim 18 , wherein the Al containing material comprises aluminum monoxide (AlO) or aluminum monocarbide (AlC). 20. A semiconductor device comprising: a channel fin; a trench adjacent to an upper region of the channel fin; and an oxygen-blocking layer within the trench; wherein the oxygen-blocking layer comprises an oxygen gettering material configured to remove, through absorption, oxygen from an environment to which the oxygen-blocking layer is exposed.
adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions · CPC title
Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) · CPC title
of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318) · CPC title
using multiple gate spacer layers, e.g. bilayered sidewall spacers · CPC title
of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.