Matrix multiplication using optical processing

US11860666B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11860666-B2
Application numberUS-201916671726-A
CountryUS
Kind codeB2
Filing dateNov 1, 2019
Priority dateNov 2, 2018
Publication dateJan 2, 2024
Grant dateJan 2, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Systems and methods for performing matrix operations using a photonic processor are provided. The photonic processor includes encoders configured to encode a numerical value into an optical signal and optical multiplication devices configured to output an electrical signal proportional to a product of one or more encoded values. The optical multiplication devices include a first input waveguide, a second input waveguide, a coupler circuit coupled to the first input waveguide and the second input waveguide, a first detector and a second detector coupled to the coupler circuit, and a circuit coupled to the first detector and second detector and configured to output a current that is proportional to a product of a first input value and a second input value.

First claim

Opening claim text (preview).

What is claimed is: 1. A photonic processor comprising: a plurality of row encoders, each of the plurality of row encoders configured to encode a row value into an optical signal of a plurality of optical signals; a plurality of column encoders, each of the plurality of column encoders configured to encode a column value into a different optical signal of the plurality of optical signals; and a plurality of optical multiplication devices, each of the plurality of optical multiplication devices being coupled to a respective one of the plurality of row encoders and a respective one of the plurality of column encoders, and wherein each of the plurality of optical multiplication devices is configured to output an electrical signal proportional to a product of an encoded row value and an encoded column value. 2. The photonic processor of claim 1 , wherein: each of the plurality of row encoders is configured to encode the row value into both an amplitude and a phase of the optical signal of a plurality of optical signals; and each of the plurality of column encoders is configured to encode the column value into both an amplitude and a phase of the different optical signal of the plurality of optical signals. 3. The photonic processor of claim 1 , wherein each of the plurality of optical multiplication devices comprises a photodetector. 4. The photonic processor of claim 3 , wherein each of the plurality of optical multiplication devices comprises a homodyne detector. 5. The photonic processor of claim 1 , wherein each of the plurality of row encoders and each of the plurality of column encoders comprise a Mach-Zehnder modulator. 6. The photonic processor of claim 1 , wherein each of the plurality of row encoders and each of the plurality of column encoders are coupled to one or more phase shifters. 7. The photonic processor of claim 6 , wherein the one or more phase shifters are configured to correct for phase errors caused by one or more of differences in an optical path length to each optical multiplication device of the plurality of optical multiplication devices and/or temperature fluctuations. 8. The photonic processor of claim 1 , wherein each of the plurality of row encoders and each of the plurality of column encoders is coupled to an optical splitter. 9. The photonic processor of claim 1 , further comprising a plurality of waveguides configured to transmit a respective encoded optical signal from each of the plurality of row encoders and each of the plurality of column encoders to each of the plurality of optical multiplication devices. 10. The photonic processor of claim 1 , wherein the plurality of optical multiplication devices comprises a first optical multiplication device, the first optical multiplication device comprising: a first input waveguide configured to receive a first optical signal, the first optical signal comprising a first value; a second input waveguide configured to receive a second optical signal, the second optical signal comprising a second value; a coupler circuit coupled to the first input waveguide and the second input waveguide and configured to output a first mixed optical signal and a second mixed optical signal by mixing the first optical signal and the second optical signal; a first detector coupled to the coupler circuit and configured to output a first electrical signal based on the first mixed optical signal; a second detector coupled to the coupler circuit and configured to output a second electrical signal based on the second mixed optical signal; and a circuit coupled to the first detector and second detector and configured to output a third electrical signal that is proportional to a product of the first value and the second value based on the first electrical signal and the second electrical signal. 11. The photonic processor of claim 10 , wherein the circuit is configured to subtract the first electrical signal from the second electrical signal. 12. The photonic processor of claim 10 , wherein the first value is encoded in an amplitude and a phase of the first optical signal, and the second value is encoded in an amplitude and a phase of the second optical signal. 13. The photonic processor of claim 10 , wherein the first input waveguide and the second input waveguide comprise substantially single-mode waveguides. 14. The photonic processor of claim 10 , wherein the first input waveguide, the second input waveguide, the coupler circuit, the first detector, the second detector, and the circuit are disposed on a same substrate. 15. A method of performing matrix-matrix and/or tensor multiplication using a plurality of optical multiplication devices, the method comprising: encoding, using a plurality of row encoders, a row value of a first matrix into an optical signal of a plurality of optical signals; encoding, using a plurality of column encoders, a column value of a second matrix into a different optical signal of the plurality of optical signals; and outputting, from each optical multiplication device of the plurality of optical multiplication devices, an electrical signal that represents a product of the respective row value and the respective column value. 16. The method of claim 15 , wherein: encoding the row value of the first matrix into the optical signal of the plurality of optical signals comprises encoding the row value of the first matrix into both an amplitude and a phase of the optical signal of the plurality of optical signals; and encoding the column value of the second matrix into the different optical signal of the plurality of optical signals comprises encoding the column value of the second matrix into both an amplitude and a phase of the optical signal of the plurality of optical signals. 17. The method of claim 15 , further comprising: accumulating a plurality of the output electrical signals from each of the plurality of optical multiplication devices using one or more electrical storage devices; and outputting, from the one or more electrical storage devices, one or more electrical signals representing the product of two matrices. 18. The method of claim 15 , wherein outputting the electrical signals comprises detecting, using a plurality of homodyne detectors, the encoded optical signals from the plurality of row encoders and the plurality of column encoders. 19. The method of claim 15 , further comprising phase shifting, using one or more phase shifters, the encoded optical signals from the plurality of row encoders and the plurality of column encoders. 20. The method of claim 19 , wherein phase shifting, using the one or more phase shifters, further comprises correcting for phase errors caused by one or more of differences in an optical path length to each optical multiplication device of the plurality of optical multiplication devices and/or temperature fluctuations. 21. The method of claim 19 , wherein phase shifting, using the one or more phase shifters, further comprises encoding values as complex numbers. 22. The method of claim 19 , wherein phase shifting, using the one or more phase shifters, further comprises encoding positive numbers with a first phase and negative numbers with a second phase having a it-phase difference with respect to the first phase. 23. At least one non-transitory computer-readable medium comprising instructions, which, when executed by an at least one photonic processor, cause the at least one photonic processor to perform a method of: encodi

Assignees

Inventors

Classifications

  • G06E3/005Primary

    using electro-optical or opto-electronic means · CPC title

  • G02F3/00Primary

    Optical logic elements; Optical bistable devices · CPC title

  • Matrix or vector computation · CPC title

  • Matrix or vector computation · CPC title

  • Backpropagation, e.g. using gradient descent · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11860666B2 cover?
Systems and methods for performing matrix operations using a photonic processor are provided. The photonic processor includes encoders configured to encode a numerical value into an optical signal and optical multiplication devices configured to output an electrical signal proportional to a product of one or more encoded values. The optical multiplication devices include a first input waveguide…
Who is the assignee on this patent?
Lightmatter Inc
What technology area does this patent fall under?
Primary CPC classification G06E3/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 02 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).