Display device and method of manufacturing same

Patent metadata

Field	Value
Publication number	US-11856830-B2
Application number	US-202017130730-A
Country	US
Kind code	B2
Filing date	Dec 22, 2020
Priority date	Dec 31, 2019
Publication date	Dec 26, 2023
Grant date	Dec 26, 2023

Abstract

The present disclosure relates to a display device and a method of manufacturing the same, the display device including: a substrate including a pixel area and a non-pixel area adjacent to the pixel area; a power line formed on the substrate; at least one insulation layer covering the power line; a connection electrode formed on the at least one insulation layer, and connected to the power line through a contact hole; an overcoat layer placed above the connection electrode in the pixel area; and a first electrode placed above the overcoat layer, wherein the connection electrode has at least an area formed in the non-pixel area, and the first electrode extends to the non-pixel area and is connected to the connection electrode.

First claim

What is claimed is:

1. A display device comprising:
a substrate including a pixel area and a non-pixel area adjacent to the pixel area;
a power line formed on the substrate;
at least one insulation layer covering the power line;
a connection electrode formed on the at least one insulation layer, the connection electrode connected to the power line through a contact hole;
an overcoat layer covering the connection electrode in the pixel area;
a first electrode formed on the overcoat layer;
an emission layer on the first electrode; and
a second electrode on the emission layer,
wherein the connection electrode has at least an area formed in the non-pixel area and the area of the connection electrode in the non-pixel area includes a hole through a portion of the connection electrode such that the connection electrode includes a first portion and a second portion where the first portion of the connection electrode is closer to the first electrode than the second portion of the connection electrode, and
the second electrode extends to the non-pixel area and is connected to the first portion of the connection electrode by covering a part of an inner side surface of the first portion of the connection electrode that is exposed by the hole, the first portion of the connection electrode electrically connecting the second electrode to the power line,
wherein the connection electrode comprises a first metal layer, a second metal layer, and a third metal layer, an inner surface of the hole has a reverse-tapered shape in the second metal layer and the third metal layer, the second electrode contacts the third metal layer but not the first metal layer and the second metal layer, and the second electrode contacts the inner side surface of the third metal layer.

2. The display device of claim 1 , wherein the first electrode is formed between the overcoat layer and the second electrode in the pixel area and the display device further comprising:
a bank covering an area of the first electrode.

3. The display device of claim 2 , wherein the emission layer covers the first electrode and the bank, the emission layer extending to the non-pixel area.

4. The display device of claim 2 , wherein the emission layer is formed within an area surrounded by the bank.

5. The display device of claim 2 , further comprising:
a first passivation film formed between the connection electrode and the overcoat layer.

6. The display device of claim 5 , further comprising:
a barrier formed inside the hole,
wherein at least a part of the barrier is made of a same material as the first passivation film.

7. The display device of claim 6 , wherein at least an area of the emission layer and the first electrode are formed on the barrier.

Assignees

• Lg Display Co Ltd

Inventors

• Lee Jungeun
• Kim Chulho
• Kim Namkook
• Choi Sungwoo
• Lee Hwankeon
• Moon Youngkyun
• Lee Jihun

Classifications

• H10K71/233

  by photolithographic etching · CPC title

• H10K71/16

  using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering · CPC title

• H10K50/805

  Electrodes · CPC title

• H10K50/84

  Passivation; Containers; Encapsulations · CPC title

• H10K59/124

  Insulating layers formed between TFT elements and OLED elements · CPC title