Nitride-based semiconductor devices with recesses for dicing and methods of fabricating the same

Patent metadata

Field	Value
Publication number	US-11854887-B2
Application number	US-202016767123-A
Country	US
Kind code	B2
Filing date	Apr 10, 2020
Priority date	Apr 10, 2020
Publication date	Dec 26, 2023
Grant date	Dec 26, 2023

Abstract

The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a group III-V layer disposed on the substrate, a dielectric layer disposed on the group III-V layer, and an inclined sidewall extending from the dielectric layer to the substrate. Wherein the substrate comprising a relative rough surface opposite the inclined sidewall.

First claim

What is claimed is:

1. A nitride-based semiconductor structure, comprising:
a substrate;
a group 111-V nitride layer disposed on the substrate;
a dielectric layer disposed on the group 111-V nitride layer;
a first sidewall extending from the dielectric layer onto the substrate;
a second sidewall disposed opposite the first sidewall, and extending from the dielectric layer onto the substrate,
wherein the first sidewall and the second sidewall define a recess, and wherein a base of the recess is the substrate;
a passivation layer extending over the nitride-based semiconductor structure and into the recess, the passivation layer covering the first and second sidewalls and a portion of the substrate; and
an opening formed in the passivation layer exposing a portion of the substrate, the opening defining an alignment mark for pre-dicing;
wherein the passivation layer comprises a first portion and a second portion disposed on a surface of the substrate, and the opening is defined by the first portion and the second portion, wherein the first portion covers a first corner of the recess, and the second portion covers a second corner of the recess; and
the first portion and the second portion extend on the surface of the substrate, the first portion has a first surface facing opposite to the first sidewall, the second portion has a second surface facing opposite to the second sidewall, and the first surface and the second surface are smooth and perpendicular to the surface of the substrate.

2. The nitride-based semiconductor structure according to claim 1 , wherein an exposed portion of the substrate is not coplanar with an interface between the substrate and the group 111-V nitride layer.

3. The nitride-based semiconductor structure according to claim 1 , wherein the surface of the substrate and the first sidewall define a first angle, wherein the first angle is in a range of 90 degrees to 150 degrees.

4. A method for fabricating the nitride-based semiconductor device of claim 1 , comprising:
providing a semiconductor structure having a substrate, a group 111-V nitride layer and a dielectric layer;
forming a recess extending from the dielectric layer to the substrate;
forming a metal layer covering the dielectric layer and the recess;
forming a photoresist layer on the metal layer;
performing a first photolithography process and a second photolithography process on the photoresist layer; wherein
the focus setting of the first photolithography process is different from the focus setting of the second photolithography process;
forming a patterned metal layer; and
forming a passivation layer covering the patterned metal layer, wherein the passivation layer covers sidewalls of the recess and a portion of a surface of the substrate;
wherein the passivation layer comprises a first portion and a second portion disposed on the surface of the substrate, an opening is formed in the passivation layer exposing a portion of the substrate and defined by the first portion and the second portion, the first portion covers a first corner of the recess, and the second portion covers a second corner of the recess; and
the first portion and the second portion extend on the surface of the substrate, the first portion has a first surface facing opposite to the first sidewall, the second portion has a second surface facing opposite to the second sidewall, and the first surface and the second surface are smooth and perpendicular to the surface of the substrate;
performing a singulation process at the opening formed in the passivation layer.

5. The method according to claim 4 , wherein the focus setting of the first photolithography process is selected in accordance with the top of the recess.

6. The method according to claim 4 , wherein the focus setting of the second photolithography process is selected in accordance with the bottom of the recess.

Assignees

• Innoscience Zhuhai Technology Co Ltd

Inventors

• Du Weixing
• Zhang Yulong
• Ouyang jue
• Chang Minghong

Classifications

• H10P50/71

  using masks for conductive or resistive materials · CPC title

• H10W42/00

  Arrangements for protection of devices (arrangements for thermal protection H10W40/00) · CPC title

• H10W74/141

  the encapsulations being on at least the sidewalls of the semiconductor body · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

• H10W46/501

  for use before dicing · CPC title