Drain switched split amplifier with capacitor switching for noise figure and isolation improvement in split mode

Patent metadata

Field	Value
Publication number	US-11848648-B2
Application number	US-202217573375-A
Country	US
Kind code	B2
Filing date	Jan 11, 2022
Priority date	May 29, 2018
Publication date	Dec 19, 2023
Grant date	Dec 19, 2023

Abstract

An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

First claim

What is claimed is:

1. A method for amplifying a signal comprising:
(a) providing at least two amplifiers, each amplifier including an input transistor and a respective controllable output transistor, each input transistor including (1) a gate configured to receive an applied signal input, (2) a source and (3) a drain coupled to a source of the respective controllable output transistor;
(b) selectively coupling the drain of the input transistor of a first amplifier of the at least two amplifiers to the drain of the input transistor of a second amplifier of the at least two amplifiers; and
(c) selectively coupling the source of the input transistor of the first amplifier to the source of the input transistor of the second amplifier.

2. The method of claim 1 , further including coupling the drains of the input transistors of the first and second amplifiers during a first mode of operation and uncoupling the drains of the input transistors of the first and second amplifiers during a second mode of operation.

3. The method of claim 1 , further including applying a phase shift to a signal conducted from the drain of the input transistor of the first amplifier to the drain of the input transistor of the second amplifier.

4. The method of claim 1 , wherein selectively coupling the drains of the input transistors of the first and second amplifiers is through an impedance in series with a switch.

5. The method of claim 4 , wherein the impedance includes at least one of a capacitor, an inductor, and/or a resistive component.

6. The method of claim 4 , wherein the impedance is established by a resonant circuit.

7. The method of claim 1 , further including selectively coupling the source of at least one input transistor to circuit ground.

8. The method of claim 1 , further including selectively coupling the source of at least one input transistor through an inductor to circuit ground.

9. A method for amplifying a signal comprising:
(a) providing at least two amplifiers, each amplifier including an input transistor and a respective controllable output transistor, each input transistor including (1) a gate configured to receive an applied signal input, (2) a source and (3) a drain coupled to a source of the respective controllable output transistor; and
(b) selectively coupling the drain of the input transistor of a first amplifier of the at least two amplifiers to the drain of the input transistor of a second amplifier of the at least two amplifiers;
(c) selectively coupling the source of the input transistor of the first amplifier to the source of the input transistor of the second amplifier; and
(d) coupling an amplifier controller to the first and second amplifiers and configuring the amplifier controller to selectively couple or uncouple the drains of the input transistors of the first and second amplifiers, and to selectively couple or uncouple the sources of the input transistors of the first and second amplifiers.

10. The method of claim 9 , further including configuring the amplifier controller to couple the drains of the input transistors of the first and second amplifiers during a first mode of operation and uncouple the drains of the input transistors of the first and second amplifiers during a second mode of operation.

11. The method of claim 9 , further including applying a phase shift to a signal conducted from the drain of the input transistor of the first amplifier to the drain of the input transistor of the second amplifier.

12. The method of claim 9 , wherein selectively coupling the drains of the input transistors of the first and second amplifiers is through an impedance in series with a switch.

13. The method of claim 12 , wherein the impedance includes at least one of a capacitor, an inductor, a resistive component, and/or a resonant circuit.

14. The method of claim 9 , further including selectively coupling the source of at least one input transistor to circuit ground.

15. The method of claim 9 , further including selectively coupling the source of at least one input transistor through an inductor to circuit ground.

16. A method for amplifying a signal comprising:
(a) providing at least two amplifiers, each amplifier including an input transistor and a respective controllable output transistor, each input transistor including (1) a gate configured to receive an applied signal input, (2) a source and (3) a drain coupled to a source of the respective controllable output transistor; and
(b) selectively coupling the drain of the input transistor of a first amplifier of the at least two amplifiers to the drain of the input transistor of a second amplifier of the at least two amplifiers;
(c) selectively coupling the source of the input transistor of the first amplifier to the source of the input transistor of the second amplifier; and
(d) coupling an amplifier controller to the first and second amplifiers and configuring the amplifier controller (a) to couple the drains of the input transistors of the first and second amplifiers during a first mode of operation and uncouple the drains of the input transistors of the first and second amplifiers during a second mode of operation, and (b) to couple the sources of the input transistors of the first and second amplifiers during the second mode of operation and uncouple the sources of the input transistors of the first and second amplifiers during the first mode of operation.

17. The method of claim 16 , wherein selectively coupling the drains of the input transistors of the first and second amplifiers is through an impedance in series with a switch.

18. The method of claim 17 , wherein the impedance includes at least one of a capacitor, an inductor, a resistive component, and/or a resonant circuit.

19. The method of claim 16 , further including selectively coupling the source of at least one input transistor to circuit ground.

20. The method of claim 16 , further including selectively coupling the source of at least one input transistor through an inductor to circuit ground.

Assignees

• Psemi Corp

Inventors

• Pal Kashish
• Ayranci Emre
• Sanner Miles

Classifications

• H03F1/223 Primary

  with MOSFET's · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F3/68

  Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics {(power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602)} · CPC title

• H04L27/2647

  Arrangements specific to the receiver only (equalisation H04L27/01) · CPC title