Resistance access memory device and fabricating method of the same

Patent metadata

Field	Value
Publication number	US-11844294-B2
Application number	US-202117401533-A
Country	US
Kind code	B2
Filing date	Aug 13, 2021
Priority date	Sep 14, 2020
Publication date	Dec 12, 2023
Grant date	Dec 12, 2023

Abstract

A resistance access memory device includes a first electrode, a resistance change layer, formed on the first electrode, comprising a thin film containing BiX 1 3 and and Bi 2 X 2 (3-x) , and a second electrode formed on the resistance change layer, where X 1 is a halogen element selected from the group consisting of F, Cl, Br, I, and combinations thereof, X 2 is a chalcogen element selected from the group consisting of S, Se, Te, and combinations thereof, and x is a real number of 0 or more and less than 3.

First claim

What is claimed is:

1. A resistance access memory device comprising:
a first electrode;
a resistance change layer, formed on the first electrode, the resistance change layer comprising a thin film containing BiX 1 3 and Bi 2 X 2 (3-x) ; and
a second electrode formed on the resistance change layer,
wherein X 1 is a halogen element selected from the group consisting of F, Cl, Br, I, and combinations thereof, X 2 is a chalcogen element selected from the group consisting of S, Se, Te, and combinations thereof, and x is a real number of 0 or more and less than 3.

2. The resistance access memory device of claim 1 , wherein the thin film has a composition gradient of the BiX 1 3 component and the Bi 2 X 2 (3-x) component.

3. The resistance access memory device of claim 2 , wherein the thin film comprises a first area where a composition ratio of BiX 1 3 is more than 55 at %, a second area where the composition ratio of BiX 1 3 is more than 12 at % and 55 at % or less, and a third area where the composition ratio of BiX 1 3 is 12 at % or less.

4. The resistance access memory device of claim 3 , wherein the first area, the second area, and the third area are separated from each other.

5. The resistance access memory device of claim 4 , wherein a current on/off ratio of the resistance access memory device including the first area is 10 4 to 10 10 .

6. The resistance access memory device of claim 4 , wherein the resistance access memory device including the second area is write once read many (WORM).

7. The resistance access memory device of claim 1 , further comprising:
a polymer protective layer formed on the resistance change layer.

8. The resistance access memory device of claim 7 , wherein the polymer protective layer comprises a polymer selected from the group consisting of polymethyl methacrylate, polyethylene oxide, polypropylene oxide, polydimethylsiloxane, polyacrylonitrile, polyvinyl chloride, polyvinylidene fluoride, polyvinylidene fluoride-hexafluoropropylene, polyethyleneimine, polyphenylene terephthalamide, polymethoxy polyethylene glycol methacrylate, poly 2-methoxyethyl glycidyl ether, and combinations thereof.

9. The resistance access memory device of claim 1 , wherein each of the first electrode and the second electrode comprises a material selected from the group consisting of Pt, Ti, Ag, Au, Ni, Zr, Ta, Zn, Nb, Cr, Co, Mn, Fe, Al, Mg, Si, W, Cu, lanthanum metals, nitrides thereof, oxides thereof, and combinations thereof.

10. A storage device comprising the resistance access memory device of claim 1 .

11. A fabricating method of a resistance access memory device, comprising:
depositing a first electrode on a substrate;
depositing a resistance change layer on the substrate, the resistance change layer comprising BiX 1 3 and Bi 2 X 2 (3-x) , wherein X 1 is a halogen element selected from the group consisting of F, Cl, Br, I, and combinations thereof, X 2 is a chalcogen element selected from the group consisting of S, Se, Te, and combinations thereof, and x is a real number of 0 or more and less than 3; and
depositing a second electrode on the resistance change layer.

12. The fabricating method of the resistance access memory device of claim 11 , wherein the depositing of the resistance change layer forms a thin film on the substrate by supplying a precursor containing Bi, a halogen element precursor, a chalcogen element precursor, and heat together.

13. The fabricating method of the resistance access memory device of claim 12 , wherein in the depositing of the resistance change layer, according to a composition ratio of a halogen element of the halogen element precursor and a chalcogen element of the chalcogen element precursor, a concentration gradient of the BiX 1 3 and the Bi 2 X 2 (3-x) occurs in the resistance change layer.

14. The fabricating method of the resistance access memory device of claim 11 , further comprising:
forming a polymer protective layer on the resistance change layer after the depositing of the resistance change layer.

15. The fabricating method of the resistance access memory device of claim 14 , wherein the polymer protective layer is coated by a method selected from the group consisting of spin coating, bar coating, nozzle printing, spray coating, slot die coating, gravure printing, inkjet printing, screen printing, electrohydrodynamic jet printing, electrospray, and combinations thereof.

16. The fabricating method of the resistance access memory device of claim 15 , wherein a solvent used in the coating comprises a material selected from the group consisting of chlorobenzene, pyridine, aniline, dimethylformamide, dimethylsulfoxide, dimethylacetamide, N-methylpyrrolidone, N-methyl-2-pyridine, branched alcohol with 3 to 6 carbon atoms, and combinations thereof.

17. The fabricating method of the resistance access memory device of claim 11 , wherein the substrate comprises a material selected from the group consisting of FTO, Si, SiO 2 , SiC, Ga, SiGe, ITO, Al 2 O 3 , InAs, GaAs, InP, GaN, InGaAs, InAlAs, GaSb, AlSb, AIP, GaP and combinations thereof.

Assignees

• Research & Business Found Sungkyunkwan Univ

Inventors

• Suk Jung Hyun
• Sang Han Gil
• Lee Sangmyeong
• Kim Won Bin
• Lee Jae Myeong
• Kim Jun Young
• Gong Oh Young
• Choi Jin Hyuk

Classifications

• H10N70/882 Primary

  Compounds of sulfur, selenium or tellurium, e.g. chalcogenides · CPC title

• H10B63/82 Primary

  the switching components having a common active material layer · CPC title

• H10N70/021

  Formation of switching materials, e.g. deposition of layers · CPC title

• H10N70/24

  based on migration or redistribution of ionic species, e.g. anions, vacancies · CPC title

• H10N70/821

  Device geometry · CPC title