Electromagnetic interference shielding in recesses of electronic modules

Patent metadata

Field	Value
Publication number	US-11844200-B2
Application number	US-202017031074-A
Country	US
Kind code	B2
Filing date	Sep 24, 2020
Priority date	Oct 31, 2019
Publication date	Dec 12, 2023
Grant date	Dec 12, 2023

Abstract

An electronic module having at least two electronic components mounted on a substrate. The electronic components are covered by a dielectric material. The dielectric material has a recess between adjacent electronic components. The surface of the recess facing at least one electronic component is coated with a conductive layer while the opposite surface to that coated recess surface is substantially free of a conductive layer. Also disclosed is a process for making the above-specified electronic module.

First claim

What is claimed:

1. An electronic module comprising:
a substrate defining a substrate plane;
at least two electronic components mounted on the substrate adjacent to each other;
a dielectric material covering the electronic components and defining a recess between the adjacent electronic components with a first surface facing one of the electronic components and a second surface opposite the first surface; and
a conductive layer coating the first surface of the recess and at least a portion of the dielectric material outside the recess, wherein the second surface of the recess is substantially free of the conductive layer, wherein a thickness of the conductive layer in the recess and a thickness of the conductive layer outside the recess do not differ by more than a factor of two, and wherein the first and second surfaces of the recess are oriented at an angle of 90°-5° with respect to the substrate plane.

2. The electronic module according to claim 1 wherein the recess has at least one cross section perpendicular to the substrate plane with an aspect ratio of 7 or less.

3. The electronic module according to claim 1 wherein the recess is a trench.

4. The electronic module according to claim 1 wherein the recess has a bottom and the bottom is coated with the conductive layer.

5. The electronic module according to claim 1 wherein the conductive layer comprises a metal or consists of metal.

6. The electronic module according to claim 1 wherein the recess has a full width at half-maximum in the range from 20-400 μm.

7. The electronic module according to claim 6 wherein the recess has a full width at half-maximum in the range from 50-250 μm.

8. The electronic module according to claim 1 wherein the conductive layer coating the first surface of the recess is part of an electromagnetic interference shielding for at least one electronic component of the electronic module.

9. The electronic module according to claim 8 wherein the electromagnetic interference shielding has a sheet resistance of 20 mOhm/□ or less.

10. The electronic module according to claim 1 wherein the conductive layer has a dampening factor for radiation with frequencies above 1 GHz of at least 20 dB.

11. The electronic module according to claim 1 wherein the conductive layer coating the first surface of the recess has a thickness of 5 nm or more and 5 μm or less.

12. A process for producing an electronic module having at least two electronic components mounted on a substrate, the process comprising:
providing the substrate defining a substrate plane;
mounting the at least two electronic components on the substrate;
covering the at least two electronic components with a dielectric material while defining a recess between the at least two electronic components with a first surface facing one of the at least two electronic components and a second surface opposite the first surface, wherein the first and second surfaces of the recess are oriented at an angle of 90°-5° with respect to the substrate plane; and
inkjet printing an ink composition to produce a conductive layer wherein the first surface of the recess and at least a portion of the dielectric material outside the recess are coated with the conductive layer while the second surface of the recess is substantially free of the conductive layer, wherein a thickness of the conductive layer in the recess and a thickness of the conductive layer outside the recess do not differ by more than a factor of two.

13. The process according to claim 12 , wherein the step of inkjet printing utilizes at least one nozzle and the at least one nozzle is configured such that the inkjet ejected by the at least one nozzle hits the first surface of the recess to be coated at an angle theta (θ) of 5°-15° relative to the first surface.

14. The process according to claim 12 , wherein the recess is defined in at least one cross section to have an aspect ratio of 7 or less.

15. The process according to claim 14 , wherein the recess is defined in at least one cross section to have an aspect ratio of 3 or less.

16. The process according to claim 12 , wherein the ink composition comprises at least these constituents: (a) a compound comprising at least one metal precursor;
and (b) at least one organic compound which is a liquid at room temperature and ambient pressure.

17. The process according to claim 16 , wherein the at least one metal precursor comprises at least one element selected from the group consisting of silver, gold, and copper.

18. The process according to claim 16 , wherein the at least one organic compound comprises an organic solvent.

19. A method of using the electronic module according to claim 1 in a computer device.

20. The method according to claim 17 , wherein the computer device is selected from the group consisting of a phone, a tablet computer, a notebook, a wearable including a watch, an embedded computer, or a desktop computer.

Assignees

• Heraeus Deutschland Gmbh & Co Kg

Inventors

• Behl Susanne
• Ulland Holger
• Stadnik Alan Paul

Classifications

• H10W42/273

  the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W42/20 Primary

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title