Nitride semiconductor device with element isolation area

Patent metadata

Field	Value
Publication number	US-11830916-B2
Application number	US-202117190070-A
Country	US
Kind code	B2
Filing date	Mar 2, 2021
Priority date	Sep 15, 2020
Publication date	Nov 28, 2023
Grant date	Nov 28, 2023

Abstract

A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a first nitride semiconductor layer;
a second nitride semiconductor layer above the first nitride semiconductor layer in a first direction and having a bandgap greater than that of the first nitride semiconductor layer;
a first source electrode on the second nitride semiconductor layer;
a second source electrode on the second nitride semiconductor layer spaced from the first source electrode in a second direction;
a first gate electrode on the second nitride semiconductor layer between the first source electrode and the second source electrode in the second direction;
a second gate electrode on the second nitride semiconductor layer between the second source electrode and the first gate electrode, the second gate electrode being spaced from the first gate electrode in the second direction;
a drain electrode on the second nitride semiconductor layer between the first gate electrode and the second gate electrode in the second direction and including:
a first wiring portion contacting the second nitride semiconductor layer,
a second wiring portion contacting the second nitride semiconductor layer, the second wiring portion spaced from the first wiring portion in the second direction,
an element isolation area extending in the first direction into the second nitride semiconductor layer from a region between the first wiring portion and the second wiring portion in the second direction, and
a third wiring portion above the first wiring portion, the second wiring portion, and the element isolation area in the first direction and electrically connected to the first wiring portion and the second wiring portion; and

an insulating material between the element isolation area and the third wiring portion in the first direction.

2. The semiconductor device according to claim 1 , further comprising:
a fourth wiring portion between the first wiring portion and the third wiring portion in the first direction and electrically connecting the first wiring portion and the third wiring portion to each other; and
a fifth wiring portion between the second wiring portion and the third wiring portion and electrically connecting the second wiring portion and the third wiring portion to each other.

3. The semiconductor device according to claim 2 , wherein
the width of the fourth wiring portion in the second direction is less than the width of the first wiring portion in the second direction, and
the width of the fifth wiring portion in the second direction is less than the width of the second wiring portion in the second direction.

4. The semiconductor device according to claim 2 , wherein the first and second wiring portions extend in the first direction from the second nitride semiconductor layer but do not directly contact a lowermost surface of the third wiring portion.

5. The semiconductor device according to claim 2 , wherein
the drain electrode extends along the second nitride semiconductor layer in a third direction orthogonal to the first and second directions, and
the element isolation area is continuous along the third direction for the length of the drain electrode in the third direction.

6. The semiconductor device according to claim 1 , wherein
the drain electrode extends along the second nitride semiconductor layer in a third direction orthogonal to the first and second directions, and
the element isolation area is continuous along the third direction for the length of the drain electrode in the third direction.

7. The semiconductor device according to claim 1 , wherein
the drain electrode extends along the second nitride semiconductor layer in a third direction orthogonal to the first and second directions, and
the element isolation area is provided as separated portions spaced along the third direction for the length of the drain electrode in the third direction.

8. The semiconductor device according to claim 7 , further comprising:
a plurality of fourth wiring portions extending from the third wiring portion to the second nitride semiconductor layer in the first direction, the fourth wiring portions being spaced from each other in the third direction and between the first and second wiring portions in the second direction, the fourth wiring portions not overlapping with the element isolation area in the first direction.

9. The semiconductor device according to claim 1 , wherein the first and second wiring portions extend in parallel with each other along a third direction orthogonal to the first and second directions.

10. The semiconductor device according to claim 1 , wherein the first and second wiring portions extend along the second nitride semiconductor layer and intersect each other.

11. The semiconductor device according to claim 1 , wherein
the first source electrode extends along the second nitride semiconductor layer in a third direction orthogonal to the first and second directions, and the width of the first source electrode in the second direction decreases with increasing distance along the third direction,
the second source electrode extends along the second nitride semiconductor layer in the third direction, and the width of the second source electrode in the second direction decreases with increasing distance along the third direction, and
the drain electrode extends along the second nitride semiconductor layer in the third direction, and the width of the drain electrode in the second direction increases with increasing distance along the third direction.

12. The semiconductor device according to claim 1 , wherein the element isolation area has end portion embedded in the first nitride semiconductor layer.

13. The semiconductor device according to claim 1 , wherein a portion of second nitride semiconductor layer is between the first nitride semiconductor layer and the element isolation area in the first direction.

14. The semiconductor device according to claim 1 , wherein the element isolation area is on the uppermost surface of the of the first nitride semiconductor layer.

15. A semiconductor device, comprising:
a substrate;
a first nitride semiconductor layer on the substrate;
a second nitride semiconductor layer on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer;
a first source electrode on the second nitride semiconductor layer and extending in a first direction that is parallel to a surface of the substrate;
a second source electrode on the second nitride semiconductor layer, spaced from the first source electrode in a second direction parallel to the surface of the substrate, and extending in the first direction;
a first gate electrode on the second nitride semiconductor layer between the first source electrode and the second source electrode in the second direction and extending in the first direction;
a second gate electrode on the second nitride semiconductor layer between the second source electrode and the first gate electrode in the second direction and extending in the first direction;
a drain electrode on the second nitride semiconductor layer between the first gate electrode and the second gate electrode in the second direction and including:
a first wiring portion on the second nitride semiconductor layer and extending in the first direction,
a second wiring portion on the second nitride semiconductor layer, between the second gate electrode and the first wiring portion in the second direction, and extending in the first direction,
a plurality of element isolation areas in the second nitride semiconductor layer unde

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Yoshioka Akira
• Isobe Yasuhiro
• Hung Hung
• Kobayashi Hitoshi
• Ohno Tetsuya
• Sugiyama Toru

Classifications

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10D62/8503 Primary

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D64/257

  for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title