Shift register unit and driving method therefor, gate driving circuit and display device

Patent metadata

Field	Value
Publication number	US-11823629-B2
Application number	US-202117793075-A
Country	US
Kind code	B2
Filing date	Apr 2, 2021
Priority date	Apr 2, 2020
Publication date	Nov 21, 2023
Grant date	Nov 21, 2023

Abstract

A shift register unit includes a first input/output unit which includes a first pull-down control circuit and a first auxiliary input circuit, and a second input/output unit which includes a second pull-down control circuit and a second auxiliary input circuit. The first pull-down control circuit controls a level of a first pull-down node. The first auxiliary input circuit is coupled to the first pull-down control circuit and controls the first pull-down control circuit together with a level of a first pull-up node in response to a display control signal and a blanking control signal. The second pull-down control circuit controls a level of a second pull-down node. The second auxiliary input circuit is coupled to the second pull-to down control circuit and controls the second pull-down control circuit together with a level of a second pull-up node in response to the display control signal and the blanking control signal.

First claim

What is claimed is:

1. A shift register unit, comprising a first input/output unit and a second input/output unit, wherein
the first input/output unit includes a first pull-down control circuit and a first auxiliary input circuit, the first pull-down control circuit is coupled to a first pull-up node and a first pull-down node, the first auxiliary input circuit is coupled to the first pull-down control circuit, the first auxiliary input circuit is configured to control the first pull-down control circuit together with a level of the first pull-up node in response to a display control signal and a blanking control signal; and the first pull-down control circuit is configured to control a level of the first pull-down node under control of both the level of the first pull-up node and the first auxiliary input circuit; and
the second input/output unit includes a second pull-down control circuit and a second auxiliary input circuit, the second pull-down control circuit is coupled to a second pull-up node and a second pull-down node; the second auxiliary input circuit is coupled to the second pull-down control circuit; the second auxiliary input circuit is configured to control the second pull-down control circuit together with a level of the second pull-up node in response to the display control signal and the blanking control signal; and the second pull-down control circuit is configured to control a level of the second pull-down node under control of both the level of the second pull-up node and the second auxiliary input circuit.

2. The shift register unit according to claim 1 , wherein
the first pull-down control circuit includes a first transistor, a second transistor, a third transistor and a fourth transistor; a control electrode of the first transistor is coupled to a first voltage terminal, a first electrode of the first transistor is coupled to the first voltage terminal, and a second electrode of the first transistor is coupled to a first auxiliary node and a control electrode of the second transistor; a first electrode of the second transistor is coupled to the first voltage terminal, and a second electrode of the second transistor is coupled to the first pull-down node; a control electrode of the third transistor is coupled to the first pull-up node, a first electrode of the third transistor is coupled to the first auxiliary node, and a second electrode of the third transistor is coupled to a second voltage terminal; and a control electrode of the fourth transistor is coupled to the first pull-up node, a first electrode of the fourth transistor is coupled to the first pull-down node, and a second electrode of the fourth transistor is coupled to the second voltage terminal; and
the first auxiliary input circuit includes a fifth transistor, a sixth transistor and a seventh transistor; a control electrode of the fifth transistor is coupled to a display control signal terminal, a first electrode of the fifth transistor is coupled to the first auxiliary node, and a second electrode of the fifth transistor is coupled to the second voltage terminal; a control electrode of the sixth transistor is coupled to a first clock signal terminal, a first electrode of the sixth transistor is coupled to the first auxiliary node, and a second electrode of the sixth transistor is coupled to a first electrode of the seventh transistor; and a control electrode of the seventh transistor is coupled to a blanking pull-up control node, and a second electrode of the seventh transistor is coupled to the second voltage terminal.

3. The shift register unit according to claim 1 , wherein
the second pull-down control circuit includes an eighth transistor, a ninth transistor, a tenth transistor and an eleventh transistor; a control electrode of the eighth transistor is coupled to a third voltage terminal, a first electrode of the eighth transistor is coupled to the third voltage terminal, and a second electrode of the eighth transistor is coupled to a second auxiliary node and a control electrode of the ninth transistor; a first electrode of the ninth transistor is coupled to the third voltage terminal, and a second electrode of the ninth transistor is coupled to the second pull-down node; a control electrode of the tenth transistor is coupled to the second pull-up node, a first electrode of the tenth transistor is coupled to the second auxiliary node, and a second electrode of the tenth transistor is coupled to a second voltage terminal; and a control electrode of the eleventh transistor is coupled to the second pull-up node, a first electrode of the eleventh transistor is coupled to the second pull-down node, and a second electrode of the eleventh transistor is coupled to the second voltage terminal; and
the second auxiliary input circuit includes a twelfth transistor, a thirteenth transistor and a fourteenth transistor; a control electrode of the twelfth transistor is coupled to a display control signal terminal, a first electrode of the twelfth transistor is coupled to the second auxiliary node, and a second electrode of the twelfth transistor is coupled to the second voltage terminal; a control electrode of the thirteenth transistor is coupled to a first clock signal terminal, a first electrode of the thirteenth transistor is coupled to the second auxiliary node, and a second electrode of the thirteenth transistor is coupled to a first electrode of the fourteenth transistor; and a control electrode of the fourteenth transistor is coupled to a blanking pull-up control node, and a second electrode of the fourteenth transistor is coupled to the second voltage terminal.

4. The shift register unit according to claim 1 , wherein
the first pull-down control circuit includes a first transistor, a second transistor, a third transistor and a fourth transistor; a control electrode of the first transistor is coupled to a first voltage terminal, a first electrode of the first transistor is coupled to the first voltage terminal, and a second electrode of the first transistor is coupled to a first auxiliary node and a control electrode of the second transistor; a first electrode of the second transistor is coupled to the first voltage terminal, and a second electrode of the second transistor is coupled to the first pull-down node; a control electrode of the third transistor is coupled to the first pull-up node, a first electrode of the third transistor is coupled to the first auxiliary node, and a second electrode of the third transistor is coupled to a second voltage terminal; and a control electrode of the fourth transistor is coupled to the first pull-up node, a first electrode of the fourth transistor is coupled to the first pull-down node, and a second electrode of the fourth transistor is coupled to the second voltage terminal;
the second pull-down control circuit includes an eighth transistor, a ninth transistor, a tenth transistor and an eleventh transistor; a control electrode of the eighth transistor is coupled to a third voltage terminal, a first electrode of the eighth transistor is coupled to the third voltage terminal, and a second electrode of the eighth transistor is coupled to a second auxiliary node and a control electrode of the ninth transistor; a first electrode of the ninth transistor is coupled to the third voltage terminal, and a second electrode of the ninth transistor is coupled to the second pull-down node; a control electrode of the tenth transistor is coupled to the second pull-up node, a first electrode of the tenth transistor is coupled to the second auxiliary node, and a second electrode of the tenth transistor is coupled to the second voltage terminal; and a control electrode of the eleventh transistor is coupled to the second pull-up node, a first electrode of the eleventh transistor is coupled to the second pull-down node, and a second electrode of the ele

Assignees

• Hefei Boe Joint Tech Co Ltd
• Boe Technology Group Co Ltd
• Heifei Boe Joint Tech Co Ltd

Inventors

• Feng Xuehuan
• Li Yongqian

Classifications

• G09G3/3266 Primary

  Details of drivers for scan electrodes · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G09G2310/061

  for resetting or blanking · CPC title