Routing for DTOF sensors

Patent metadata

Field	Value
Publication number	US-11822017-B2
Application number	US-202217868261-A
Country	US
Kind code	B2
Filing date	Jul 19, 2022
Priority date	Jun 8, 2020
Publication date	Nov 21, 2023
Grant date	Nov 21, 2023

Abstract

A ToF sensor includes an array of pixels having first and second subsets of pixels, first and second pluralities of TDCs, a routing bus having first and second pluralities of bus drivers, and a controller configured to: when the first subset of pixels is active and the second subset of pixels is not active, control the first plurality of bus drivers to route events from half of the pixels of the first subset to the first plurality of TDCs and control the first and second pluralities of bus drivers to route events from the other half of the pixels of the first subset to the second plurality of TDCs, and when the first subset of pixels is not active and the second subset of pixels is active, control the first plurality of bus drivers to route events from the second subset of pixels to the first plurality of TDCs.

First claim

What is claimed is:

1. An integrated circuit (IC) comprising:
an array of pixels arranged in rows and columns, the array of pixels comprising a first subset of pixels, each pixel of the array of pixels configured to generate event signals;
a top plurality of time to digital converters (TDCs) physically disposed at a top of the array of pixels;
a bottom plurality of TDCs physically disposed at a bottom of the array of pixels;
a routing bus coupled to the top and bottom pluralities of TDCs and to the first subset of pixels, the routing bus comprising a plurality of bus drivers associated with the first subset of pixels; and
a controller configured to:
when the first subset of pixels is active, control the plurality of bus drivers to route event signals from a top half of the pixels of the first subset of pixels to the top plurality of TDCs and to route event signals from a bottom half of the pixels of the first subset of pixels to the bottom plurality of TDCs, and
when the first subset of pixels is not active, control all of the plurality of bus drivers to route event signals of the routing bus to the top plurality of TDCs.

2. The IC of claim 1 , wherein each routing line of the routing bus is configured to receive event signals from two pixels of the first subset of pixels.

3. The IC of claim 1 , wherein:
the first subset of pixels comprises L pixels, L being a positive integer greater than 1; and
the routing bus comprises L/2 routing lines.

4. The IC of claim 1 , wherein each bus driver of the plurality of bus drivers comprises:
a multiplexer;
a first buffer having an input coupled to an output of the multiplexer and an output coupled to a first input of the multiplexer, the output of the first buffer further coupled to a top TDC of the top plurality of TDCs; and
a second buffer having an input coupled to the output of the multiplexer and an output coupled to a second input of the multiplexer, the output of the second buffer further coupled to a bottom TDC of the plurality of bottom TDCs.

5. A time-of-flight (ToF) sensor comprising:
an array of pixels arranged in rows and columns, each pixel of the array of pixels configured to generate event signals, the array of pixels comprising a subset of pixels;
a routing bus coupled to the subset of pixels;
a plurality of time-capture circuits coupled to the routing bus; and
a controller configured to:
when the subset of pixels is in integration mode, route event signals from a first pixel of the subset of pixels to a first time-capture circuit of the plurality of time-capture circuits via a first routing line of the routing bus, and
when the subset of pixels is in readout mode, route data from the first time-capture circuit to a reading circuit via the first routing line.

6. The ToF sensor of claim 5 , wherein the first routing line comprises a section tri-state buffer coupled between the first pixel and a second pixel of the subset of pixels, and wherein the controller is further configured to:
when the subset of pixels is in integration mode, disable the section tri-state buffer; and
when the subset of pixels is in readout mode, enable the section tri-state buffer.

7. The ToF Sensor of claim 6 , wherein the controller is further configured to, when the subset of pixels is in integration mode, route event signals from the second pixel to a second time-capture circuit of the plurality of time-capture circuits via the first routing line.

8. The ToF sensor of claim 5 , wherein the first time-capture circuit comprises a time-to-digital converter (TDC).

9. The ToF sensor of claim 8 , wherein the first time-capture circuit further comprises a histogram generation circuit, and wherein routing data from the first time-capture circuit to the reading circuit comprises routing ToF histograms.

10. The ToF sensor of claim 5 , wherein each time-capture circuit of the plurality of time-capture circuits comprises a respective tri-state buffer coupled to the routing bus.

11. The ToF sensor of claim 5 , wherein each pixel of the subset of pixels comprises a single photon avalanche diode (SPAD) coupled to the routing bus via a respective bus driving circuit.

12. The ToF sensor of claim 11 , wherein each bus driving circuit comprises a tri-state buffer coupled to the routing bus.

13. The ToF sensor of claim 12 , wherein each bus driving circuit further comprises a multiplexer having a first input coupled to the respective SPAD, a second input coupled to a corresponding time-capture circuit of the plurality of time-capture circuits, and an output coupled to the respective tri-state buffer.

14. The ToF sensor of claim 5 , wherein the subset of pixels correspond to a first column of pixels of the array of pixels, the ToF sensor further comprising:
a second routing bus associated with a second column of pixels of the array of pixels, wherein the second column of pixels comprises a second subset of pixels; and
a second plurality of time-capture circuits coupled to the second routing bus, wherein, when the second subset of pixels is in integration mode, a second routing line of the second routing bus is configured to route event signals from a second pixel of the second subset of pixels to a second time-capture circuit of the second plurality of time-capture circuits, and when the second subset of pixels is in readout mode, the second routing line is configured to route data from the second time-capture circuit to the reading circuit.

15. The ToF sensor of claim 14 , wherein the subset of pixels and the second subset of pixels are configured to be in integration mode at the same time.

16. The ToF sensor of claim 5 , wherein the reading circuit comprises an external processor.

17. The ToF sensor of claim 5 , further comprising an illumination source configured to generate light pulses, wherein pixels of the array of pixels are configured to generate event signals from light pulses that are based on the generated light pulses.

18. A method comprising:
setting a subset of pixels of an array of pixels of a time-of-flight (ToF) sensor to integration mode, the array of pixels being arranged in rows and columns;
when the subset of pixels is in integration mode, routing event signals from a first pixel of the subset of pixels to a first time-capture circuit of a plurality of time-capture circuits via a first routing line of a routing bus;
setting the subset of pixels to readout mode; and
when the subset of pixels is in readout mode, routing data from the first time-capture circuit to a reading circuit via the first routing line.

19. The method of claim 18 , further comprising:
when the subset of pixels is in integration mode, disabling a section tri-state buffer that is coupled between the first pixel and a second pixel of the subset of pixels; and
when the subset of pixels is in readout mode, enabling the section tri-state buffer.

20. The method of claim 19 , further comprising, when the subset of pixels is in integration mode, routing event signals from the second pixel to a second time-capture circuit of the plurality of time-capture circuits via the first routing line.

21. The method of claim 18 , further comprising:
generating a plurality of light pulses; and
receiving reflected light pulses with the array of pixels, wherein the event signals are based on the reflected light pulses.

22. The method of claim 18 , wherein the first time-capture circuit comprises a time-to-digital converter (TDC), wherein the first time-capt

Assignees

• St Microelectronics Res & Dev Ltd

Inventors

• Dutton Neale
• Moore John Kevin

Classifications

• H04N25/705

  Pixels for depth measurement, e.g. RGBZ · CPC title

• H04N25/70 Primary

  SSIS architectures; Circuits associated therewith · CPC title

• G01S7/4863 Primary

  Detector arrays, e.g. charge-transfer gates · CPC title

• G01S17/89

  for mapping or imaging · CPC title

• G01S17/894 Primary

  Three-dimensional [3D] imaging with simultaneous measurement of time-of-flight at a two-dimensional [2D] array of receiver pixels, e.g. time-of-flight cameras or flash lidar · CPC title