Methods for forming memory and memory

Patent metadata

Field	Value
Publication number	US-11818875-B2
Application number	US-202117310646-A
Country	US
Kind code	B2
Filing date	Apr 1, 2021
Priority date	Apr 8, 2020
Publication date	Nov 14, 2023
Grant date	Nov 14, 2023

Abstract

A method for forming a memory includes: providing a substrate, a plurality of discrete bit line structures being located on the substrate, and an area surrounded by the adjacent bit line structures and the substrate and having a central axis; forming, on the substrate, a first conductive film filling an area between the adjacent bit line structures; etching the first conductive film by a first etching process to form a first conductive layer; forming a second conductive film on the top surface of the first conductive layer; and etching the second conductive film and the first conductive layer by a second etching process, the remaining second conductive film and the first conductive layer forming a capacitive contact window.

First claim

What is claimed is:

1. A method for forming a memory, comprising:
providing a substrate, a plurality of discrete bit line structures being located on the substrate, and an area surrounded by the adjacent bit line structures and the substrate and having a central axis;
forming, on the substrate, a first conductive film filling an area between the adjacent bit line structures;
etching the first conductive film by a first etching process to form a first conductive layer, the thickness of the first conductive layer, in a direction from sidewalls of the bit line structure to the central axis, gradually decreases in a direction perpendicular to the surface of the substrate;
forming a second conductive film on the top surface of the first conductive layer; and
etching the second conductive film and the first conductive layer by a second etching process, the remaining second conductive film and the first conductive layer forming a capacitive contact window, and, by the second etching process, the etching rate for the second conductive film being less than the etching rate for the first conductive layer.

2. The method for forming a memory according to claim 1 , wherein said etching the second conductive film and the first conductive layer by a second etching process comprises:
etching, in a first step of the etching process, the second conductive film until the first conductive layer is exposed; and
etching, in a second step of the etching process, the second conductive film and the exposed first conductive layer, the etching rate for the second conductive film in the second step of the etching process being less than the etching rate for the first conductive layer.

3. The method for forming a memory according to claim 2 , wherein a height of the capacitive contact window is between a height of a top surface and a height of a bottom surface of a metal layer in the bit line structure.

4. The method for forming a memory according to claim 1 , wherein a height of the capacitive contact window is between the heights of the top surface and the height of the bottom surface of a metal layer in the bit line structure.

5. The method for forming a memory according to claim 1 , wherein the forming, on the substrate, a first conductive film filling an area between the adjacent bit line structures comprises: forming, on the substrate, a first conductive film filling an area between the adjacent bit line structures and covering the top surface of the bit line structure, a gap being formed in the first conductive film within the area.

6. The method for forming a memory according to claim 5 , wherein, after the first etching process is performed, the first conductive layer has a hole; and in a step of forming the second conductive film, the second conductive film fills the hole.

7. The method for forming a memory according to claim 5 , wherein a height of the top surface of the first conductive film is at least 20 nm higher than the height of the top surface of the bit line structure.

8. The method for forming a memory according to claim 1 , wherein the forming a second conductive film on the top surface of the first conductive layer comprises: forming, on the top surface of the first conductive layer, a second conductive film covering the top surface of the bit line structure.

9. The method for forming a memory according to claim 8 , wherein the forming, on the top surface of the first conductive layer, a second conductive film covering the top surface of the bit line structure comprises:
depositing an initial second conductive film on the top surface of the first conductive layer, the height of the top surface of the initial second conductive film being higher than the height of the top surface of the bit line structure; and
flattening the initial second conductive film to form the second conductive film.

10. The method for forming a memory according to claim 9 , wherein a height of the top surface of the initial second conductive film is at least 20 nm higher than the height of the top surface of the bit line structure.

11. The method for forming a memory according to claim 1 , wherein the etching gas used in the first etching process comprises chlorine gas, and the flow rate of the etching gas ranges from 20 sccm to 60 sccm.

12. The method for forming a memory according to claim 1 , wherein process parameters of the second etching process are same as process parameters of the first etching process.

13. The method for forming a memory according to claim 1 , wherein a material for the first conductive film is a first semiconductor material doped with first ions, and a material for the second conductive film is a second semiconductor material doped with second ions or a non-doped second semiconductor material, a doping concentration of the first ion being greater than a doping concentration of the second ion.

14. The method for forming a memory according to claim 13 , wherein a difference in doping concentration between the first ion and the second ion ranges from 30 Atoms/cm 3 to 70 Atoms/cm 3 .

15. The method for forming a memory according to claim 14 , wherein the doping concentration of the first ion ranges from 50 Atoms/cm 3 to 500 Atoms/cm 3 ; and the doping concentration of the second ion ranges from 0 Atoms/cm 3 to 450 Atoms/cm 3 .

16. A memory, comprising:
a substrate, a plurality of discrete bit line structures being located on the substrate, and an area surrounded by the adjacent bit line structures and the substrate and having a central axis;
a capacitive contact window, located on the substrate between the bit line structures;
wherein the capacitive contact window is composed of a part of a second conductive film and a part of a first conductive layer, a top surface of the part of the first conductive layer has a hole, and the part of the second conductive film fills the hole formed on the top surface of the part of the first conductive layer;
a material for a first conductive film is a first semiconductor material doped with first ions, and a material for the second conductive film is a second semiconductor material doped with second ions or a non-doped second semiconductor material, a doping concentration of the first ion being greater than a doping concentration of the second ion; and
a height of the capacitive contact window is between a height of a top surface and a height of a bottom surface of a metal layer in the bit line structure.

17. The memory according to claim 16 , wherein a difference in doping concentration between the first ion and the second ion ranges from 30 Atoms/cm 3 to 70 Atoms/cm 3 .

Assignees

• Changxin Memory Tech Inc

Inventors

• Zhu Xiao
• Chen Yi-Hsiang
• Yang Lihui
• Lin Hung-I
• Mi Yun-Chieh
• Gong Jinfeng

Classifications

• H10B12/0335 Primary

  Making a connection between the transistor and the capacitor, e.g. plug · CPC title

• H10B12/315

  with the capacitor higher than a bit line · CPC title

• H10B12/34

  the transistor being at least partially in a trench in the substrate · CPC title

• H10B12/482

  Bit lines · CPC title

• H10B12/01 Primary

  Manufacture or treatment · CPC title