Photonic chip security structure

Patent metadata

Field	Value
Publication number	US-11815717-B2
Application number	US-202117525293-A
Country	US
Kind code	B2
Filing date	Nov 12, 2021
Priority date	Nov 12, 2021
Publication date	Nov 14, 2023
Grant date	Nov 14, 2023

Abstract

The present disclosure relates to semiconductor structures and, more particularly, to a photonic chip security structure and methods of manufacture. The structure includes an optical component and a photonic chip security structure having a vertical wall composed of light absorbing material surrounding the optical component.

First claim

What is claimed:

1. A structure comprising:
an optical component on a semiconductor substrate and which is surrounded by dielectric material of a dielectric stack of material; and
a photonic chip security structure comprising a vertical wall composed of light absorbing material, the vertical wall of the photonic chip security structure being on sides of the optical component and extending through the dielectric stack of material,
wherein the semiconductor substrate comprises a silicon-on-insulator (SOI) substrate and the vertical wall extends through a semiconductor layer of the SOI substrate and onto an underlying buried oxide layer under the semiconductor layer of the SOI substrate,
wherein the vertical wall comprises lateral projections, the lateral projections comprising the light absorbing material.

2. The structure of claim 1 , wherein the dielectric stack of material includes an oxide based material and a nitride based material, and the lateral projections are provided within the nitride based material.

3. The structure of claim 1 , wherein the lateral projections are of different sizes along a height of the vertical wall.

4. The structure of claim 1 , further comprising a top wall connecting to the vertical wall and over the optical component.

5. The structure of claim 1 , further comprising a bottom wall connecting to the vertical wall and under the optical component.

6. The structure of claim 1 , wherein the light absorbing material comprises one of polySiliconGermanium, polyGermanium and polySilicon.

7. The structure of claim 1 , wherein the optical component comprises one of a waveguide, an optical component at a back end of the line area and an optical component at a front end of the line area and the vertical wall extends into the underlying buried oxide layer.

8. A structure comprising:
a semiconductor substrate;
an optical component on the semiconductor substrate;
a dielectric stack of material over the semiconductor substrate; and
a vertical wall with lateral projections within the dielectric stack of material, and the vertical wall being positioned on sides of the optical component,
wherein the semiconductor substrate comprises a semiconductor on insulator (SOI) substrate and the vertical wall extends into a buried insulator material of the SOI substrate.

9. The structure of claim 8 , wherein the dielectric stack of material comprises alternating dielectric materials composed of a first insulator material and a second insulator material different than the first insulator material.

10. The structure of claim 8 , wherein the lateral projections are provided in the first insulator material.

11. The structure of claim 10 , wherein the lateral projections comprise different sizes.

12. The structure of claim 8 , wherein the vertical wall and lateral projections comprise light absorbing material.

13. The structure of claim 8 , wherein the vertical wall comprises light absorbing material and lateral projections comprise airgaps.

14. The structure of claim 8 , further comprising at least a top wall over the optical component and connecting to the vertical wall to enclose the optical component.

15. A method comprising:
forming an optical component on a semiconductor substrate and which is surrounded by dielectric material of a dielectric stack of material; and
forming a photonic chip security structure comprising a vertical wall composed of light absorbing material, the vertical wall of the photonic chip security structure being formed on sides of the optical component and extending through the dielectric stack of material,
wherein the semiconductor substrate comprises a silicon-on-insulator (SOI) substrate and the vertical wall extends through a semiconductor layer and onto an underlying buried oxide layer under the semiconductor layer of the SOI substrate, and
wherein the vertical wall comprises lateral projections, the lateral projections comprising the light absorbing material.

16. The structure of claim 8 , wherein the optical component is surrounded by dielectric material of the stack of material, the dielectric stack of material on the buried insulator material and over a semiconductor layer.

17. The structure of claim 8 , wherein the vertical wall on sides of the optical component extends through the dielectric stack of material and a semiconductor layer and into the buried insulator material.

18. The structure of claim 8 , wherein the lateral projections are airgaps which extend outwardly from opposing sidewalls of the vertical wall and extend into the dielectric stack of material.

Assignees

• Globalfoundries Us Inc

Inventors

• Jain Vibhor
• Polomoff Nicholas A
• Bian Yusheng

Classifications

• H10W42/40

  protecting against tampering, e.g. unauthorised inspection or reverse engineering · CPC title

• G02B6/122 Primary

  Basic optical elements, e.g. light-guiding paths · CPC title

• G02B6/243

  as light absorbers · CPC title

• H01L23/573

  Electricity · mapped topic

• G02B2006/12061

  Silicon · CPC title